SNLU300A January 2023 – February 2023 DS160PR1601 , DS320PR1601
The DS320PR1601 internal registers can be accessed through standard SMBus protocol. The DS320PR1601 features eight banks of channels, A_Bank 0 (Channels 0–3) and A_Bank 1 (Channels 4–7), A_Bank 0 (Channels 8-11), A_Bank 1 (Channels 12-15), B_Bank 0 (Channels 0–3) and B_Bank 1 (Channels 4–7), B_Bank 0 (Channels 8-11), B_Bank 1 (Channels 12-15) each featuring a separate register set and requiring a unique SMBus target address. The SMBus target address pairs (one for each channel bank) are determined at power up based on the configuration of the x_ADDR1_x and x_ADDR0_x pins. The pin state is read on power up, after the internal power-on reset signal is deasserted.
There are 16 unique SMBus target address pairs (one address for each channel bank) that can be assigned to the device by placing external resistor straps on the x_ADDR1_x and x_ADDR0_x pins as listed in Table 2-3.
x_ADDR1_x Pin Level | x_ADDR0_x Pin Level | A/B Bank 0: 7-Bit Address [HEX] | A/B Bank 1: 7-Bit Address [HEX] |
---|---|---|---|
L0 | L0 | 0x18 | 0x19 |
L0 | L1 | 0x1A | 0x1B |
L0 | L2 | 0x1C | 0x1D |
L0 | L3 | 0x1E | 0x1F |
L1 | L0 | 0x20 | 0x21 |
L1 | L1 | 0x22 | 0x23 |
L1 | L2 | 0x24 | 0x25 |
L1 | L3 | 0x26 | 0x27 |
L2 | L0 | 0x28 | 0x29 |
L2 | L1 | 0x2A | 0x2B |
L2 | L2 | 0x2C | 0x2D |
L2 | L3 | 0x2E | 0x2F |
L3 | L0 | 0x30 | 0x31 |
L3 | L1 | 0x32 | 0x33 |
L3 | L2 | 0x34 | 0x35 |
L3 | L3 | 0x36 | 0x37 |