SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address 00050044 – DPWM 3 Counter Preset Register
Address 00070044 – DPWM 2 Counter Preset Register
Address 000A0044 – DPWM 1 Counter Preset Register
Address 000D0044 – DPWM 0 Counter Preset Register
17 | 4 | 3 | 0 |
PRESET | Reserved |
R/W-00 0000 0000 0000 | R-0000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
17-4 | PRESET | R/W | 00 0000 0000 0000 | Counter preset value, counter reset to this value upon detection of sync when PRESET_EN bit in DPWMCTRL2 is enabled. Low resolution register, last 4 bits are read-only. |
3-0 | Reserved | R | 0000 |