SLVUCG1 December   2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Before You Begin
  4. 2Schematic
  5. 3EVM Setup
    1. 3.1 Jumper Connections
      1. 3.1.1 J1
      2. 3.1.2 J2
      3. 3.1.3 J3
      4. 3.1.4 J4
      5. 3.1.5 J5
      6. 3.1.6 J6
      7. 3.1.7 J7
      8. 3.1.8 J8
      9. 3.1.9 J9
    2. 3.2 Test Points
    3. 3.3 Soldering Guidelines
  6. 4Equipment Connection and Operation
  7. 5PCB Layout
  8. 6Bill of Materials (BOM)

PCB Layout

Figure 5-1 through Figure 5-4 illustrate the layout for the UA78LEVM-075.

GUID-20221128-SS0I-MW1T-BDNJ-84ZV5SXGZCTW-low.gif Figure 5-1 UA78LEVM-075 Top Assembly Layer and Silkscreen
GUID-20221128-SS0I-D1TQ-BTW0-SPTKGBGFSTJZ-low.gif Figure 5-2 UA78LEVM-075 Top Layer Routing
GUID-20221128-SS0I-RW3W-LC7Q-2V169SL5GZPL-low.gif Figure 5-3 UA78LEVM-075 Bottom Layer Routing
GUID-20221128-SS0I-RJ4K-CR4K-9GLF7XPCWWM1-low.gif Figure 5-4 UA78LEVM-075 Bottom Assembly Layer and Silkscreen