SLVK157 October 2023 TPS7H2140-SEP
PRODUCTION DATA
The TPS7H2140-SEP Data Sheet Electrical Parameters are comprised of electrical and switching characteristics lists as shown in the following tables.
| Parameter | Test Conditions | MIN | TYP | MAX | Unit | Tests | ||
|---|---|---|---|---|---|---|---|---|
| OPERATING VOLTAGE | ||||||||
| INUVLOR | Internal VIN UVLO rising | 3.5 | 3.7 | 4 | V | 6.1 | ||
| INUVLOF | Internal VIN UVLO falling | 3 | 3.2 | 3.4 | 6.2 | |||
| HYSTIN-UVLO | Internal VIN UVLO hysteresis | 0.5 | 6.3 | |||||
| OPERATING CURRENT | ||||||||
| IQ | Quiescent current with diagnostics disabled | ENx = 5 V, DIAG_EN = 0 V, IOUTx = 0 A, current limit = 2 A, all channels on | 7.0 | mA | 5.9, 5.10, 5.11, 5.12 | |||
| IQ_DIAG | Quiescent current with diagnostics enabled | ENx = DIAG_EN = 5 V, IOUTx = 0 A, current limit = 2 A, all channels on | 6.2 | 5.5, 5.6, 5.7, 5.8 | ||||
| ISD | Shutdown current with diagnostics disabled | ENx = DIAG_EN = OUTx = THER = 0 V |
TA = 25°C | 0.5 | µA | 5.13, 5.14, 5.15, 5.16 | ||
| TA = 125°C | 5 | |||||||
| ISD_DIAG | Shutdown current with diagnostic enabled | ENx = 0 V, DIAG_EN = 5 V, VIN – VOUTx < VOL_OFF, not in open-load mode | 5 | mA | 5.17, 5.18, 5.19, 5.20 | |||
| tLOW_OFF | ENx signal low time during cycling | ENx from high to low, if elapsed time > tLOW_OFF, the device enters into standby mode | 10 | 12.5 | 15 | ms | 5.49, 5.50, 5.51, 5.52 | |
| IF | IN to OUTx forward leakage current | ENx = DIAG_EN = OUTx = 0 | TA = 25°C | 0.5 | µA | 5.21, 5.22, 5.23, 5.24, 5.25, 5.26, 5.27, 5.28, 5.29, 5.30, 5.31, 5.32, 5.33, 5.34, 5.35, 5.36 | ||
| ENx = DIAG_EN = OUTx = 0 | TA = 125°C | 8 | ||||||
| POWER STAGE | ||||||||
| RON | On-state resistance | TA = 25°C | 165 | mΩ | 12.1, 12.2, 12.3, 12.4, 12.5, 12.6, 12.7, 12.8, 12.9, 12.10, 12.11, 12.12, 12.13, 12.14, 12.15, 12.16 | |||
| TA = 125°C | 280 | |||||||
| ΔRON | Percentage Difference in On-state resistance between channels (RON_CHx – RON_CHy ) | TA = 25°C | 6% | 12.17, 12.18, 12.19, 12.20, 12.21, 12.22, 12.23, 12.24, 12.25, 12.26, 12.27, 12.28, 12.29, 12.30, 12.31, 12.32, 12.33, 12.34, 12.35, 12.36, 12.37. 12.38, 12.39, 12.40 | ||||
| ICL_INTERNAL | Internal current limit | Internal current limit value, CL pin connected to GND | 11 | A | ||||
| ICL_INTERNAL_TSD | Current limit during thermal shutdown | Internal current limit value under thermal shutdown | 6.5 | |||||
| ICL_TSD | Current limit during thermal shutdown | External current limit value under thermal shutdown. The percentage of the external current limit setting value |
70% | |||||
| VDS_CLAMP | Source-to-drain body diode voltage | 50 | 70 | V | 14.2, 14.4, 14.6, 14.8 | |||
| OUTPUT DIODE CHARACTERISTICS | ||||||||
| VF | Drain−source diode voltage | ENx = 0, IOUTX = −0.15 A. | 0.3 | 0.7 | 0.9 | V | 8.5, 8.6, 8.7, 8.8 | |
| IR1 | Continuous reverse current from source to drain | t
< 60 s, VIN = 24 V, ENx = 0 V. Single channel reversed current to supply |
TA = 25°C | 2.5 | A | |||
| IR2 | Continuous reverse current from source to drain | t
< 60 s, VIN = 24 V, ENx = 0 V. GND pin 1-kΩ resistor in parallel with diode. Reverse-current condition, All channels reversed |
TA = 25°C | 2.0 | ||||
| LOGIC INPUT (ENx, DIAG_EN, SEL, SEH, THER) | ||||||||
| VIH | Logic high-level voltage | 2 | V | 7.101, 7.401, 7.701, 7.1001, 7.131, 7.161, 7.191 | ||||
| VIL | Logic low-level voltage | 0.8 | 7.201, 7.501, 7.801, 7.111, 7.141, 7.171, 7.2001 | |||||
| RPULL_DOWN | Logic-pin pulldown resistor | VIN = VDIAG_EN = 5 V | 200 | 275 | 350 | kΩ | 7.29 | |
| VIN = VENx = VSEL = VSEH = VTHER = 5 V | 100 | 175 | 250 | 7.22, 7.23, 7.24, 7.25, 7.26, 7.27, 7.28 | ||||
| DIAGNOSTICS | ||||||||
| IGND_LOSS | Output leakage current under GND loss condition | 100 | µA | 8.1, 8.2, 8.3, 8.4 | ||||
| VOL_OFF | Open load detection threshold | VENx = 0 V, when VIN –
VOUTx > VOL_OFF. Duration longer than tOL_OFF, then open load is detected, off state. |
1.6 | 2.6 | V | 9.1 | ||
| tOL_OFF | Open-load detection threshold deglitch time | VENx = 0 V, when VIN –
VOUTx> VOL_OFF. Duration longer than tOL_OFF, then open load is detected, off state |
300 | 550 | 800 | µs | 9.11 | |
| IOL_OFF | Off-state output sink current | VENx = 0 V, VDIAG_EN= 5 V, VIN – VOUTx = 24 V, open load | TA = 125°C | 100 | µA | 9.2, 9.3, 9.4, 9.5 | ||
| VOL_FAULT | Fault low-output voltage | IFAULT = 2 mA | 0.2 | V | 9.10 | |||
| tCL_DEGLITCH | Deglitch time when current limit occurs | ENx = DIAG_EN = 5 V. The deglitch time from current limit event to FAULT = Low and VCS_FAULT |
220 | µs | 15.29 | |||
| TSD | Thermal shutdown threshold | 160 | 175 | °C | ||||
| TSD_RST | Thermal shutdown status reset threshold | 155 | ||||||
| Tsw | Thermal swing shutdown threshold | 60 | ||||||
| THYS | Hysteresis for resetting the thermal shutdown or thermal swing | 10 | ||||||
| CURRENT SENSE AND CURRENT LIMIT | ||||||||
| KCS | Current sense ratio | 300 |
10.25, 10.26, 10.27, 10.28, 10.29, 10.30, 10.31, 10.32, 10.33, 10.34, 10.35, 10.36, 10.37, 10.38, 10.39, 10.40, 10.41, 10.42, 10.43, 10.44, 10.45, 10.46, 10.47, 10.48 |
|||||
| KCL | Current limit ratio | 2500 |
11.15, 11.16, 11.17, 11.18, 11.19, 11.20, 11.21, 11.22, 11.39, 11.40, 11.41, 11.42, 11.43, 11.44, 11.45, 11.46, 11.47, 11.48, 11.49, 11.50 |
|||||
| VCL_TH | Current limit internal threshold voltage | 0.8 | V | |||||
| dKCS / KCS | Current sense accuracy, (ICS × KCS – IOUT) / IOUT × 100 | VIN = 13.5 V, IOUTx ≥ 5 mA | –65% | 65% | 10.1, 10.7, 10.13, 10.19 | |||
| dKCS / KCS | VIN = 13.5 V, IOUTx ≥ 25 mA | –15% | 15% | 10.2, 10.8, 10.14, 10.20 | ||||
| dKCS / KCS | VIN = 13.5 V, IOUTx ≥ 50 mA | –8% | 8% | 10.3, 10.9, 10.15, 10.21 | ||||
| dKCS / KCS | VIN = 13.5 V, IOUTx ≥ 100 mA | –4% | 4% | 10.4, 10.10, 10.16, 10.22 | ||||
| dKCL / KCL | External current limit accuracy, (IOUTx – ICL × KCL) × 100 / (ICL × KCL) | VIN = 13.5 V, ILIMIT ≥ 250 mA | –20% | 20% | 11.1, 11.3, 11.5, 11.7 | |||
| VIN = 13.5 V, 2 A ≤ ILIMIT ≤ 4 A | –15% | 15% | 11.23, 11.24, 11.25, 11.26, 11.27, 11.28, 11.29, 11.30, 11.31, 11.32, 11.33, 11.34 | |||||
| VCS_LINEAR | Current-sense voltage linear range | VIN ≥ 6.5 V | 0 | 4 | V | 10.761 | ||
| 5 V ≤ VIN < 6.5 V | 0 | VIN – 2.5 | 10.791 | |||||
| IOUTx_LINEAR | Output-current linear range | VIN ≥ 6.5 V, VCS_LINEAR ≤ 4 V | 0 | 2.5 | A | |||
| 5 V ≤ VIN < 6.5 V, VCS_LINEAR ≤ VIN – 2.5 V | 0 | 2.5 | ||||||
| VCS_FAULT | Current sense pin output voltage | VIN ≥ 7 V, FAULT mode | 4.5 | 6.5 | V | 9.12 | ||
| 5 V ≤ VIN < 7 V, FAULT mode | Min(VIN – 2.3, 4.5) | 6.5 | ||||||
| ICS_FAULT | Current-sense pin output current available in fault mode | VCS = 4.5 V, VIN > 7 V | 15 | mA | 9.13 | |||
| ICS_LEAK | Current-sense leakage current in disabled mode | VDIAG_EN = 0 V | TA = 125ºC | 0.5 | µA | |||
| Parameter | TEST CONDITIONS | MIN | TYP | MAX | UNIT | Tests | |
|---|---|---|---|---|---|---|---|
| POWER STAGE | |||||||
| tON | Turn-on delay time | VIN = 13.5 V, VDIAG_EN = 5 V,
IOUTx = 500 mA, from ENx rising edge to 10% of VOUTx |
20 | 50 | 90 | µs | 15.1, 15.8, 15.15, 15.22 |
| tOFF | Turn-off delay time | VIN = 13.5 V, VDIAG_EN = 5 V,
IOUTx = 500 mA, from ENx falling edge to 90% of VOUTx |
20 | 50 | 90 | 15.2, 15.9, 15.16, 15.23 | |
| tRISE | Channel turn-on time | VIN = 13.5 V, VDIAG_EN = 5 V,
IOUTx = 500 mA, from 50% of ENx to 90% of VOUTx |
66 | 88 | 125 | 15.3, 15.10, 15.17, 15.24 | |
| tFALL | Channel turn-off time | VIN = 13.5 V, VDIAG_EN = 5 V,
IOUTx = 500 mA, from 50% of ENx to 10% of VOUTx |
66 | 88 | 125 | 15.4, 15.11, 15.18, 15.25 | |
| tMATCH | tRISE – tFALL | VIN = 13.5 V, IOUT = 500 mA. tRISE is the ENx rising edge to VOUTx = 90%. tFALL is the ENx falling edge to VOUTx = 10%. |
–50 | 50 | 15.7, 15.14, 15.21, 15.28 | ||
| SRON | Turn-on slew rate | VIN = 13.5 V, VDIAG_EN = 5 V,
IOUTx = 500 mA, from ENx rising edge to 10% of VOUTx |
0.1 | 0.3 | 0.55 | V/µs | 15.5, 15.12, 15.19, 15.26 |
| SROFF | Turn-off slew rate | VIN = 13.5 V, VDIAG_EN = 5 V,
IOUTx = 500 mA, from ENx falling edge to 90% of VOUTx |
0.1 | 0.3 | 0.55 | 15.6, 15.13, 15.20, 15.27 | |
| CURRENT SENSE | |||||||
| tCS_OFF1 | CS settling time from DIAG_EN disabled | VIN = 13.5 V, VENx = 5 V, IOUTx = 500 mA. Current Limit = 2 A. From VDIAG_EN falling edge to 10% of VCS. | 20 | µs | 16.1 | ||
| tCS_ON1 | CS settling time from DIAG_EN enabled | VIN = 13.5 V, VENx = 5 V, IOUTx = 500 mA. Current Limit = 2 A. From VDIAG_EN rising edge to 90% of VCS. | 20 | 16.2 | |||
| tCS_OFF2 | CS settling time from IN falling edge | VIN = 13.5 V, VENx = 5 V, IOUTx = 500 mA. Current Limit = 2 A. From VENx falling edge to 10% of VCS. | 30 | 100 | 16.3 | ||
| tCS_ON2 | CS settling time from IN rising edge | VIN = 13.5 V, VENx = 5 V,
IOUTx = 500 mA. Current Limit = 2 A. From VENx rising edge to 90% of VCS. |
50 | 150 | 16.4 | ||
| tMUX | Multi-sense transition delay from channel to channel | VDIAG_EN = 5V, current sense output delay when
multi-sense pins SEL and SEH transition from channel to channel |
50 | 16.5 | |||