SLUAAH1 December   2021 UCC24624

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 LLC Resonant Converter
    2. 1.2 Synchronous Rectification (SR)
      1. 1.2.1 Diode Rectification and Synchronous Rectification
      2. 1.2.2 Power Loss for Synchronous Rectification
      3. 1.2.3 UCC24624 Introduction
  3. 2Configurations of Secondary Rectifier Circuit using UCC24624
    1. 2.1 Typical Configuration
    2. 2.2 Single SR Controller with Paralleled MOSFETs Configuration
    3. 2.3 Dual SR Controllers with Paralleled MOSFETs Configuration
    4. 2.4 Multi SR Controllers with Matrix Transformer Configuration
  4. 3Summary
  5. 4References

2.1 Typical Configuration

A typical configuration of UCC24624 is shown in Figure 2-1. The UCC24624 provides two high current gate drive outputs, each capable of driving one or N channel power MOSFETs. Each gate driver is controlled separately and an interlock logic circuit prevents the two synchronous rectifiers from being on at the same time.

The control scheme in UCC24624 switches on each SR MOSFET when its VDS falls below -265mV turn-on threshold, and turns it off when VDS rises above the turn-off threshold. The turn-off threshold could be adjusted to maximizing the conduction time of the SR MOSFETs to compensate the offset voltage caused by the parasitic inductance.

GUID-20211217-SS0I-0Z4Q-P7PF-BGG0P86WVZXH-low.pngFigure 2-1 UCC24624 Typical Application Schematic