SLAA380B December   2007  – September 2018 MSP430F2616 , MSP430F2617 , MSP430F2618 , MSP430F2619

 

  1.   Migrating From MSP430F16x MCUs to MSP430F261x MCUs
    1.     Trademarks
    2. 1 Comparison of MSP430F1xx and MSP430F2xx Families
    3. 2 Hardware Considerations for MSP430F16x to MSP430F261x Migration
      1. 2.1 Device Package and Pinout
      2. 2.2 Current Consumption
      3. 2.3 Operating Frequency and Supply Voltage
      4. 2.4 Device Errata
    4. 3 MSP430F16x to MSP430F261x Migration – Firmware Considerations
      1. 3.1 CPU and Memory Considerations
        1. 3.1.1 Extended Memory Architecture
        2. 3.1.2 Subroutine Parameter Passing and Stack Frame
        3. 3.1.3 MSP430X Instruction Cycle Count Optimizations
        4. 3.1.4 Device Memory Map
        5. 3.1.5 Information Flash Memory
      2. 3.2 Serial Communication – USART Versus USCI
        1. 3.2.1 UART Mode
        2. 3.2.2 SPI Mode
        3. 3.2.3 I2C Mode
      3. 3.3 Clock System
        1. 3.3.1 LFXT1 and XT2 Oscillators
        2. 3.3.2 Digitally Controlled Oscillator (DCO)
      4. 3.4 Bootloader
      5. 3.5 Interrupt Vectors
      6. 3.6 Beware of Reserved Bits!
      7. 3.7 Timers
      8. 3.8 Analog Comparator
    5. 4 References
  2.   Revision History

3.5 Interrupt Vectors

The interrupt vector arrangement of MSP430F16x and MSP430F261x devices are different, and application code using interrupt-controlled program flow needs to be migrated. Migrating to an MSP430F261x device involves ensuring that the new interrupt vector locations are used. See Table 3 for a list of module-associated interrupt vectors that require attention.

Table 3. Changed Interrupt Vector Locations

Module MSP430F16x MSP430F261x Comments
Timer_A3 0xFFEA, 0xFFEC 0xFFF0, 0xFFF2
ADC12 0xFFEE 0xFFEA
Port 1 0xFFE8 0xFFE4
Port 2 0xFFE2 0xFFE6
USART0, USCI_A0/B0 0xFFF0, 0xFFF2 0xFFEC, 0xFFEE The USCI interrupt vectors are multiplexed between RX, TX, I2C data, and I2C status events.
USART1, USCI_A1/B1 0xFFE4, 0xFFE6 0xFFE0, 0xFFE2
DAC12 0xFFE0 (shared vector) 0xFFDC F261x has dedicated vectors for DAC12 and DMA, thus simplifying software design.
DMA 0xFFDE

In general, recompiling the MSP430F16x application code using MSP430F261x device support files automatically populates the interrupt vector table according to the device-specific requirements (for example, for Timer_A or ADC12). However, in some cases, the interrupt vector routines themselves also need to be modified to accommodate a different interrupt flag demultiplexing scheme (for example, USART compared to USCI, DAC12, and DMA).

Also, the memory range that is reserved for interrupt vectors (interrupt vector table) differs between MSP430F16x and MSP430F261x devices. For MSP430F16x devices, this memory ranges from address 0xFFE0 to 0xFFFF (16 words), and for MSP430F261x devices it ranges from 0xFFC0 to 0xFFFF (32 words). In addition, the word memory location 0xFFBE is reserved on MSP430F261x devices and used as the bootloader (BSL) security key (see Section 3.4).