SLAA380B December   2007  – September 2018 MSP430F2616 , MSP430F2617 , MSP430F2618 , MSP430F2619

 

  1.   Migrating From MSP430F16x MCUs to MSP430F261x MCUs
    1.     Trademarks
    2. 1 Comparison of MSP430F1xx and MSP430F2xx Families
    3. 2 Hardware Considerations for MSP430F16x to MSP430F261x Migration
      1. 2.1 Device Package and Pinout
      2. 2.2 Current Consumption
      3. 2.3 Operating Frequency and Supply Voltage
      4. 2.4 Device Errata
    4. 3 MSP430F16x to MSP430F261x Migration – Firmware Considerations
      1. 3.1 CPU and Memory Considerations
        1. 3.1.1 Extended Memory Architecture
        2. 3.1.2 Subroutine Parameter Passing and Stack Frame
        3. 3.1.3 MSP430X Instruction Cycle Count Optimizations
        4. 3.1.4 Device Memory Map
        5. 3.1.5 Information Flash Memory
      2. 3.2 Serial Communication – USART Versus USCI
        1. 3.2.1 UART Mode
        2. 3.2.2 SPI Mode
        3. 3.2.3 I2C Mode
      3. 3.3 Clock System
        1. 3.3.1 LFXT1 and XT2 Oscillators
        2. 3.3.2 Digitally Controlled Oscillator (DCO)
      4. 3.4 Bootloader
      5. 3.5 Interrupt Vectors
      6. 3.6 Beware of Reserved Bits!
      7. 3.7 Timers
      8. 3.8 Analog Comparator
    5. 4 References
  2.   Revision History

3.6 Beware of Reserved Bits!

The MSP430F261x features a range of upgraded peripherals compared to the MSP430F16x, such as the BCS+ and the Comparator+. This added functionality is partially achieved through the use of bits that were previously marked as reserved on the corresponding MSP430F1xx peripheral. Newer generation MSP430s such as the MSP430F261x make use of these bits to implement additional functionality. If left in the default state, the peripheral usually behaves identical to its MSP430F1xx counterpart. However, care must be taken not to unintentionally switch some of these bits, which can be caused by migrated MSP430F16x firmware. For example, consider the following comparison of CACTL2 control register of Comparator_A and Comparator_A+:

Figure 2. CACTL2 Bit Description, F1xx Devices
7 6 5 4 3 2 1 0
Unused P2CA1 P2CA0 CAF CAOUT
rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) r-(0)
Figure 3. CACTL2 Bit Description, F2xx Devices
7 6 5 4 3 2 1 0
CASHORT P2CA4 P2CA3 P2CA2 P2CA1 P2CA0 CAF CAOUT
rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) rw-(0) r-(0)

When firmware that uses the comparator module sets bit 7 and runs fine on an MSP430F16x is executed on an MSP430F261x device, it results in the comparator inputs being shorted together internally.