SFFS728 October   2023 OPA2333-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSSOP Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSSOP Package

VSSOP Package

Figure 4-2 shows the OPA2333-Q1 pin diagram for the VSSOP package. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the OPA2333-Q1 data sheet.

GUID-4FF320B7-4039-4E5C-A715-31E5BF18AFA0-low.gifFigure 4-2 Pin Diagram (VSSOP Package)
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT A

1

Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT A voltage ultimately forced to the V‒ voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues.

A

‒IN A

2

The device does not receive negative feedback. Depending on the circuit configuration, the output most likely moves to the negative supply.

B

+IN A

3

Device common-mode is tied to the negative rail. Depending on the circuit configuration, the output likely does not respond because the device is in an invalid common-mode condition.

C

+IN B

5

Device common-mode is tied to the negative rail. Depending on the circuit configuration, the output likely does not respond because the device is in an invalid common-mode condition.

C

‒IN B

6

The device does not receive negative feedback. Depending on the circuit configuration, the output most likely moves to the negative supply.

B

OUT B

7

Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT B voltage ultimately forced to the V‒ voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues.

A

V+

8

Op amp supplies are shorted together, leaving the V+ pin at some voltage between the V+ and V‒ sources (depending on the source impedance).

A

Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT A

1

No negative feedback or ability for OUT A to drive the application.

B

‒IN A

2

Inverting pin of the op amp is left floating. Negative feedback is not provided to the device, likely resulting in the device output moving between the positive and negative rails. The ‒IN A pin voltage likely ends up at the positive or negative rail because of leakage on the ESD diodes.

B

+IN A

3

Device common-mode is disconnected. The op amp is not provided with common-mode bias, and the device output likely ends up at the positive or negative rail. The +IN A pin voltage likely ends up at the positive or negative rail because of leakage on the ESD diodes.

B

V

4

Negative supply is left floating. The op amp ceases to function because no current can source or sink to the device.

B

+IN B

5

Device common-mode is disconnected. The op amp is not provided with common-mode bias, and the device output likely ends up at the positive or negative rail. The +IN B pin voltage likely ends up at the positive or negative rail because of leakage on the ESD diodes.

B

‒IN B

6

Inverting pin of the op amp is left floating. Negative feedback is not provided to the device, likely resulting in the device output moving between the positive and negative rails. The ‒IN B pin voltage likely ends up at the positive or negative rail because of leakage on the ESD diodes.

B

OUT B

7

No negative feedback or ability for OUT B to drive the application.

B

V+

8

Positive supply is left floating. The op amp ceases to function because no current can source or sink to the device.

A

Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class

OUT A

1

2

Depending on the circuit configuration, the circuit gain is reduced to unity gain, and the application might not function as intended.

B

‒IN A

2

3

Both inputs are tied together. Depending on the offset of the device, the output voltage likely moves to near midsupply.

D

+IN A

3

4

Device common-mode is tied to the negative rail. Depending on the circuit configuration, the output likely does not respond because the device is in an invalid common-mode condition.

C

V‒

4

5

Device common-mode is tied to the negative rail. Depending on the circuit configuration, the output likely does not respond because the device is in an invalid common-mode condition.

C

+IN B

5

6

Both inputs are tied together. Depending on the offset of the device, the output voltage likely moves to near midsupply.

D

‒IN B

6

7

Depending on the circuit configuration, the circuit gain is reduced to unity gain, and the application might not function as intended.

B

OUT B

7

8

Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT B voltage ultimately forced to the V+ voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues.

A

V+

8

1

Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the V+ voltage ultimately forced to the OUT A voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues.

A

Table 4-9 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT A

1

Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT A voltage ultimately forced to the V+ voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues.

A

‒IN A

2

The device does not receive negative feedback. Depending on the noninverting input voltage and circuit configuration, the output most likely moves to the negative supply.

B

+IN A

3

Depending on the circuit configuration, the application is likely not to function because device common-mode voltage is connected to +IN A.

B

V‒

4

Op-amp supplies are shorted together, leaving the V‒ pin at some voltage between the V‒ and V+ sources (depending on the source impedance).

A

+IN B

5

Depending on the circuit configuration, the application is likely not to function because device common-mode voltage is connected to +IN B.

B

‒IN B

6

The device does not receive negative feedback. Depending on the noninverting input voltage and circuit configuration, the output most likely moves to the negative supply.

B

OUT B

7

Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the OUT B voltage ultimately forced to the V+ voltage. Prolonged exposure to short-circuit conditions can result in long-term reliability issues.

A