SFFS231B August   2021  – July 2022 TLV3601-Q1 , TLV3602-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DCK, DBV, DGK, DSG Packages
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 DCK and DBV Package
  6. 5Revision History

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TLV3601-Q1 (DCK package). The failure modes covered in this document include the typical pin-by-pin failure scenarios (results are similarly applicable for TLV3602-Q1):

  • Pin short-circuited to Ground (see Table 4-2.)
  • Pin open-circuited (seeTable 4-3.)
  • Pin short-circuited to an adjacent pin (see Table 4-4.)
  • Pin short-circuited to supply (see Table 4-5.)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Each pin is assessed individually
  • All other pins are configured correctly for device functionality