SFFS231B August   2021  – July 2022 TLV3601-Q1 , TLV3602-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DCK, DBV, DGK, DSG Packages
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 DCK and DBV Package
  6. 5Revision History

DCK and DBV Package

Figure 4-1 shows the TLV3601-Q1 pin diagram for the DCK and DBV packages. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TLV3601-Q1 data sheet.

Figure 4-1 Pin Diagram (DCK and DBV) Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT

1

Thermal stress due to high power dissipation

A

VEE

2

No change if same node as GND

D

IN+

3

Output goes low, if other input is positive

B

IN-

4

Output goes high, if other input is positive

B

VCC

5

Main suppy shorted out (no power to device)

B

Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT

1

Output can't drive application load

B

VEE

2

Lowest voltage pin will drive GND pin internally (via diode)

A

IN+

3

Output may be low or high

B

IN-

4

Output may be low or high

B

VCC

5

Main suppy open (no power to device)

B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class

OUT

1

VEE

Thermal stress due to high power dissipation

A

VEE

2

IN+

Output goes low, if other input is positive

B

IN+

3

IN-

Output may be low or high

B

IN-

4

VCC

Output goes low, if other input is less positive

B

VCC

5

OUT

Thermal stress due to high power dissipation

A

Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT

1

Thermal stress due to high power dissipation

A

VEE

2

Main suppy shorted out (no power to device)

B

IN+

3

Output goes high, if other input is less positive

B

IN-

4

Output goes low, if other input is less positive

B

VCC

5

No change if same node as VCC

D