SBAU361 December   2020 ADC3664

 

  1.   Trademarks
  2. 1Introduction
  3. 2Equipment
    1. 2.1 ADC3664EVM Functionality
    2. 2.2 Evaluation Board Feature Identification Summary
    3. 2.3 Required Equipment
  4. 3Setup Procedure
    1. 3.1 Install High-Speed Data Converter (HSDC) Pro Software
    2. 3.2 Install ADC35XXEVM GUI 1.0 Software
    3. 3.3 Connect the ADC3664 EVM and TSW1400EVM
    4. 3.4 Connect the Power Supply and Mini-USB Connections
    5. 3.5 Connect the Clocks and Analog Input
  5. 4Device Configuration
    1. 4.1 Bypass Mode
      1. 4.1.1 ADC35XX GUI: Bypass Mode Configuration
      2. 4.1.2 HSDC Pro: Bypass Mode
    2. 4.2 Real Decimation Mode
      1. 4.2.1 ADC35XX GUI: Real Decimation Mode Configuration
      2. 4.2.2 HSDC Pro: Real Decimation Mode
    3. 4.3 Complex Decimation Mode
      1. 4.3.1 ADC35XX GUI: Complex Decimation Configuration
      2. 4.3.2 HSDC PRO: Complex Decimation Mode
  6. 5Onboard FDA Configuration
  7. 6ADC3664EVM Power Monitor
  8. 7Test Pattern

4.3.1 ADC35XX GUI: Complex Decimation Configuration

Table 4-3 14-Bit, Complex Decimation, Sample Rate and DCLKIN Examples
Interface Mode DCLKIN Multiplier (Serialization Factor) Example Sample Clock Complex Decimation Factor Required DCLKIN Frequency
2 Wire 3.5 125 MSPS 2 437.5 MHz
1 Wire 7 65 MSPS 8 113.75 MHz
1/2 Wire 14 35 MSPS 32 30.625 MHz

For this 32x Complex Decimation example, apply a 125 MHz signal to J9 (sample clock) and a 27.34375 MHZ signal to J7 (DCLKIN).

Attention: External ADC sampling clock source and DCLKIN source must be frequency locked. If this is not performed, the captured data will appear scrambled. If using the onboard clocking option, the sampling clock and DCLKIN are frequency locked.

Apply a 5 MHz signal to J2 (ensure bandpass filter is used to reduce harmonics and noise of signal generator). An NCO of 4.9 MHz will be used to shift the 5 MHz input signal to -100 kHz.

After launching the ADC35xxEVM GUI perform the following steps:

  1. Under "Resolution", select "14 bit".
  2. Under "DDC", Select "Complex".
  3. For "Decimation Factor", select "32".
  4. Ensure that CDC is disabled (red).
  5. For "Fs (MHz)", select 125M.
  6. To calculate the DCLKIN frequency, enter "125" in the Fs (MHz) field, and click calculate. This is informational only.
  7. Under "FNCO A (MHz)" and "FNCO B (MHz)", enter "4.9" in the field. This field will then calculate to the nearest valid NCO value, and will auto-calculate the correct register values in the field next to it.
  8. Click "Configure".
    GUID-20201201-CA0I-40WP-4ZMQ-ZGFZS4VXWKQK-low.png Figure 4-9 ADC35XXEVM GUI: ADC3664EVM 32x Complex Decimation