8.2.1 Design Requirements
The requirements of gate-driver for driving enhancement mode GaN FET are listed as below:
- The headroom between the recommended gate-drive voltage and the absolute maximum rating of GaN transistor is generally marginal. It is critical to drive the GaN FET by an accurate gate-drive supply voltage
- The turnon threshold of the GaN transistor is generally much lower than that of silicon MOSFETs, the risk of Miller turnon and shoot-through becomes a concern for the higher-voltage devices. Low pulldown impedance is necessary to boost the immunity of Miller turnon
- With enhancement mode GaN transistors, the need for minimizing pulldown impedance means that addition pulldown gate resistor and antiparallel diode connection is not recommended. Split the gate pullup and pulldown connections and allow the insertion of external pullup resistance for EMI and voltage-overshoot control is needed
- At high switching speeds, the impact of the gate-drive interconnection impedance becomes important, low-inductance packages with good thermal capability is required for gate driver