ZHCSTB0E February   2010  – November 2023 UCC27321-Q1 , UCC27322-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. 说明(续)
  6. Related Products
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
      3. 8.3.3 Source and Sink Capabilities During Miller Plateau
      4. 8.3.4 VDD
      5. 8.3.5 Drive Current and Power Requirements
      6. 8.3.6 Enable
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-to-Output Configuration
        2. 9.2.2.2 Input Threshold Type
        3. 9.2.2.3 VDD Bias Supply Voltage
        4. 9.2.2.4 Peak Source and Sink Currents
        5. 9.2.2.5 Enable and Disable Function
        6. 9.2.2.6 Propagation Delay
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1.     40
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
    4. 11.4 Power Dissipation
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

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Input Stage

The IN threshold has a 3.3-V logic sensitivity over the full range of VDD voltage; yet, it is equally compatible with 0-V to VDD signals. The inputs of UCC2732x-Q1 family of drivers are designed to withstand 500-mA reverse current without either damage to the device or logic upset. In addition, the input threshold turnoff of the UCC2732x-Q1 is slightly raised for improved noise immunity. The input stage of each driver must be driven by a signal with a short rise or fall time. This condition is satisfied in typical power-supply applications, where the input signals are provided by a PWM controller or logic gates with fast transition times (<200 ns). The IN input of the driver functions as a digital gate, and is not intended for applications where a slow-changing input voltage is used to generate a switching output when the logic threshold of the input section is reached. While this may not be harmful to the driver, the output of the driver may switch repeatedly at a high frequency.

Users must not attempt to shape the input signals to the driver in an attempt to slow down (or delay) the signal at the output. If limiting the rise or fall times to the power device is desired, then an external resistance can be added between the output of the driver and the load device, which is generally a power MOSFET gate. The external resistor may also help dissipate power from the device package, as discussed in Section 11.3.