ZHCSI58C October 2009 – May 2018 TPS65720 , TPS65721
PRODUCTION DATA.
The charger/power path in TPS6572x contains two different features to ensure there is sufficient power at the load and the input voltage supplying the charger/power path does not collapse.
First there is output voltage DPPM, which is a control loop to keep the voltage at the output of the power path above a certain limit. In TPS6572x, the voltage at the output of the power path (SYS) is regulated to what is defined with VSYS[1,0] in register CHCONFIG0. When the current needed for the load and for charging the battery exceeds the input current limit, the voltage at SYS will collapse. The DPPM loop will reduce the charge current, such that the total current for the load and the charge current equals the input current limit. This is done as soon as the voltage at SYS drops 100 mV below the target voltage.
Second there is input voltage DPPM. For this, the input voltage to the charger/power path at pin AC is sensed to avoid the voltage from a USB port or dedicated charger to drop below a certain limit. This control loop will reduce the input current limit for pin AC as soon as the voltage at AC drops below 4.5 V (typically). With Bits ACinputcurrent[1,0] set to 00 or 01, input voltage DPPM is enabled, with ACinputcurrent=10, input voltage DPPM is disabled.