ZHCSI58C October 2009 – May 2018 TPS65720 , TPS65721
PRODUCTION DATA.
IR0 | B7 | B6 | B5 | B4 | B3 | B2 | B1 | BO |
---|---|---|---|---|---|---|---|---|
Bit name and function | TS_HOT | TS_COLD | OVP | Reserved | CH_ACTIVE | CH_PGOOD | VBAT_COMP | TH_LOOP |
Default | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Default value loaded by: | UVLO/R | UVLO/R | UVLO/R | UVLO/R | UVLO/R | UVLO/R | UVLO/R | UVLO/R |
Set by: | Rising edge of TS_HOT | Rising edge of TS_COLD | Rising edge of OVP | Reserved | Rising edge and falling edge of CH_ACTIVE | Rising edge and falling edge of CH_PGOOD | Rising edge of VBAT_COMP* | Rising edge of TH_LOOP |
Read/write | R | R | R | R | R | R | R | R |
Bit 7..2 | interrupt register:
0 = no interrupt 1 = Interrupt occurred (cleared when read); interrupt not masked in register IRMASK0 |
The VBAT_COMP interrupt is automatically disabled when the battery voltage comparator is disabled by clearing Bit 1 in register 04h (VBAT_COMP_EN) |