ZHCSMN1A December   2015  – January 2021 TPS62097

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommend Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 100% Duty Cycle Mode
      2. 8.3.2 Switch Current Limit and Hiccup Short Circuit Protection
      3. 8.3.3 Undervoltage Lockout (UVLO)
      4. 8.3.4 Thermal Shutdown
    4. 8.4 Device Function Modes
      1. 8.4.1 Enable and Disable (EN)
      2. 8.4.2 Power Save Mode and Forced PWM Mode (MODE)
      3. 8.4.3 Soft Start-up (SS/TR)
      4. 8.4.4 Voltage Tracking (SS/TR)
      5. 8.4.5 Power Good (PG)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 1.2-V Output Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Output Voltage
        2. 9.2.2.2 Output Filter Design
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Capacitor Selection
      3. 9.2.3 Application Performance Curves
      4. 9.2.4 Coincidental Voltage Tracking
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Performance Curve
      5. 9.2.5 Switching Frequency Selection
        1. 9.2.5.1 Design Requirements
        2. 9.2.5.2 Detailed Design Procedure
        3. 9.2.5.3 Application Performance Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
    2. 12.2 支持资源
    3. 12.3 接收文档更新通知
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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8.3.1 100% Duty Cycle Mode

The device offers a low input to output voltage dropout by entering 100% duty cycle mode when the input voltage reaches the level of the output voltage. In this mode, the high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. The minimum input voltage to maintain output regulation, depending on the load current and output voltage, is calculated as:

Equation 1. VIN(min) = VOUT(min) + IOUT x (RDS(on) + RL)

where

  • VIN(min) = Minimum input voltage to maintain a minimum output voltage
  • IOUT = Output current
  • RDS(on) = High side FET on-resistance
  • RL = Inductor ohmic resistance (DCR)

When the device operates close to 100% duty cycle mode, the TPS62097 cannot enter Power Save Mode regardless of the load current if the input voltage decreases to typically 15% above the output voltage. The device maintains output regulation in PWM mode.