ZHCSL73B October   2016  – June 2021 TPS54388C-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed-Frequency PWM Control
      2. 7.3.2 Slope Compensation and Output Current
      3. 7.3.3 Bootstrap Voltage (BOOT) and Low-Dropout Operation
      4. 7.3.4 Error Amplifier
      5. 7.3.5 Voltage Reference
    4. 7.4 Device Functional Modes
      1. 7.4.1  Adjusting the Output Voltage
      2. 7.4.2  Enable Functionality and Adjusting Undervoltage Lockout
      3. 7.4.3  Slow-Start or Tracking Pin
      4. 7.4.4  Sequencing
      5. 7.4.5  Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      6. 7.4.6  Overcurrent Protection
      7. 7.4.7  Frequency Shift
      8. 7.4.8  Reverse Overcurrent Protection
      9. 7.4.9  Synchronize Using the RT/CLK Pin
      10. 7.4.10 Power Good (PWRGD Pin)
      11. 7.4.11 Overvoltage Transient Protection
      12. 7.4.12 Thermal Shutdown
      13. 7.4.13 Small-Signal Model for Loop Response
      14. 7.4.14 Simple Small-Signal Model for Peak-Current-Mode Control
      15. 7.4.15 Small-Signal Model for Frequency Compensation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selecting the Switching Frequency
        2. 8.2.2.2 Output Inductor Selection
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Slow-Start Capacitor
        6. 8.2.2.6 Bootstrap Capacitor Selection
        7. 8.2.2.7 Output-Voltage and Feedback-Resistor Selection
        8. 8.2.2.8 Compensation
        9. 8.2.2.9 Power-Dissipation Estimate
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

Power-Dissipation Estimate

The following formulas show how to estimate the IC power dissipation under continuous-conduction mode (CCM) operation. The power dissipation of the IC (PT) includes conduction loss (P(con)), dead-time loss (P(d)), switching loss (P(SW)), gate-drive loss (P(gd)) and supply-current loss (P(q)).

Equation 42. GUID-77B63DF6-755A-488E-B680-2723F3EBF678-low.gif

where

  • IO is the output current (A)
  • rDS(on)(Temp) is the on-resistance of the high-side MOSFET at a given temperature (Ω)
Equation 43. GUID-157FBA60-BC0F-464D-BF74-EB61FDAF14D6-low.gif

where

  • f(SW) is the switching frequency (Hz)
Equation 44. GUID-00D73B58-646F-4FE3-85C7-84E377F97C95-low.gif

where

  • VI is the input voltage (V)
Equation 45. GUID-28E27F59-C6CD-49FC-82BE-FA018355D3D0-low.gif
Equation 46. GUID-D0980563-BA02-45A7-8D2A-DF2FDCB9581E-low.gif

Therefore:

Equation 47. GUID-6E6FAC60-0315-4CE5-8459-4AE1FE25730E-low.gif

For a given TA, use Equation 48 to calculate the junction temperature.

Equation 48. GUID-552B6BD6-95D5-4F6E-878A-8A44E7CC6C7F-low.gif

where

  • TJ is the junction temperature (°C)
  • TA is the ambient temperature (°C)
  • RθJA is the thermal resistance of the package (°C/W)
  • PT is the total device power dissipation (W)

For a given TJ(max) = 150°C, use Equation 49 to calculate the maximum ambient temperature.

Equation 49. GUID-6BD55964-4764-432A-8D0D-606CA966ED6C-low.gif

where

  • TJ(max) is maximum junction temperature (°C)
  • TA(max) is maximum ambient temperature (°C)

Additional power losses occur in the regulator circuit because of the inductor ac and dc losses and trace resistance that impact the overall efficiency of the regulator.