5 修订历史记录
Changes from C Revision (September 2013) to D Revision
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已添加 ESD 额定值表,特性描述部分,器件功能模式,应用和实施部分,电源相关建议部分,布局部分,器件和文档支持部分以及机械、封装和可订购信息部分。 Go
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Changed the Input voltage range, PROG - MAX value in the Absolute Maximum Ratings table From: 0.3 To: 3.6 Go
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Deleted External capacitance - GATE from the Recommended Operating ConditionsGo
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Deleted text from the last paragraph in the GATE section "If used, any capacitor connecting GATE and GND should not exceed 1 μF and it should be connected in series with a resistor of no less than 1 kΩ."Go
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Deleted section: Alternative Design Example: GATE Capacitor (dV/dt) Control in Inrush ModeGo
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Deleted text from the High-Gate-Capacitance Applications section "When gate capacitor dV/dt control is used, ... then a Zener diode is not necessary."Go
Changes from B Revision (May 2011) to C Revision
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Added Note to Supply Current DisabledGo
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Added Note to Fast-turnoff delayGo
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Changed Gate Comparator 6 V to 5.9 V in Functional Block DiagramGo
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Changed text From :(6 V for VVCC = 12 V) To: (5.9 V for VVCC = 12 V) in the GATE pin descriptionGo
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Changed Equation 1Go
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Changed text in the INRUSH OPERATION sectionGo
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Changed Equation 8Go
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Added text and new Equation 9Go
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Changed Equation 11Go
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Changed text From: VGS rises 6 V To: VGS rises 5.9 VGo
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Changed text following Equation 11, From: 1.23 ms To 1.22 msGo
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Changed Equation 15Go
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Changed text describing Equation 15 and Equation 16 in the Alternative Design Example section. (Equation 15 and Equation 16 deleted by revision F.)Go
Changes from A Revision (April 2011) to B Revision
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Changed voltages in PGb pin description from 140 mV and 340 mV to 170 mV and 240 mV.Go
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Changed RIMON equationGo
Changes from * Revision (March 2011) to A Revision