SPNS253A May 2018 – September 2019 TMS570LC4357-EP
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP(3) | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ICC | VCC digital supply and PLL current
(operating mode) |
fGCLK = 300 MHz,
fHCLK = 150 MHz, fVCLK = 75 MHz, fVCLK2 = 75 MHz, fVCLK3 = 150 MHz |
510 | 990(1) | mA | ||
VCC digital supply and PLL current
(LBIST mode, or PBIST mode) |
LBIST clock rate = 75 MHz | 880 | 1375(2)(4) | mA | |||
PBIST ROM clock frequency = 75 MHz | |||||||
ICCIO | VCCIO digital supply current (operating mode) | No DC load, VCCmax | 15 | mA | |||
ICCAD | VCCAD supply current (operating mode) | Single ADC operational, VCCADmax | 15 | mA | |||
Single ADC power down, VCCADmax | 5 | µA | |||||
Both ADCs operational, VCCADmax | 30 | mA | |||||
ICCREFHI | ADREFHI supply current (operating mode) | Single ADC operational, ADREFHImax | 5 | mA | |||
Both ADCs operational, ADREFHImax | 10 | mA | |||||
ICCP | VCCP pump supply current | Read operation of two banks in parallel, VCCPmax | 70 | mA | |||
Read from two banks and program or erase another bank, VCCPmax | 93 | mA |