ZHCSS29R April   2004  – April 2024 TL103W , TL103WA , TL103WB

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: OP AMP1 (VREF at Noninverting input)
    6. 5.6 Electrical Characteristics: OP AMP2 (Independent Amplifier)
    7. 5.7 Typical Characteristics: TL103WB
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Internal Reference
      2. 6.3.2 Input Common Mode Range
      3. 6.3.3 EMI Rejection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Isolated Flyback CC/CV Feedback
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Constant Current Circuit
          2. 7.2.1.2.2 Constant Voltage Circuit
      2. 7.2.2 Constant Current Sink
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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订购信息

5.6 Electrical Characteristics: OP AMP2 (Independent Amplifier)

VCC+ = 5V, VCC- = GND, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
VIO Input offset voltage VICM = 0V TL103W ±1 ±4 mV
Full range ±5
TL103WA ±0.5 ±3.0
Full range ±5
TL103WB ±0.3 ±2
Full range ±2.5
αVIO Input offset-voltage drift TL103W/TL103WA Full range ±7 µV/°C
TL103WB Full range ±2
IIO Input offset current TL103W/TL103WA ±2 ±75 nA
Full range ±150
TL103WB ±0.5 ±4
Full range ±5
IIB Input bias current TL103W/TL103WA -20 -150 nA
Full range -200
TL103WB -15
-35
 
Full range -50
AVD Large-signal voltage gain VCC+ = 15V, RL = 2kΩ, VO = 1.4V to 11.4V TL103W/TL103WA 50 100 V/mV
Full range 25 100
TL103WB 77 210
Full range 45 210
PSRR Supply-voltage rejection ratio VCC+ = 5V to 30V TL103W/TL103WA 65 100 dB
TL103WB 99 114
VICR Input common-mode voltage range VCC+ = 30V VCC- (VCC+) – 1.5 V
Full range VCC- (VCC+) – 2
CMRR Common-mode rejection ratio VCC+ = 30V TL103W/TL103WA 70 95 dB
Full range 60
TL103WB 93 104
Full range 70
IO Output current VCC+ = 15V, VO = 2V,  VID = 1V Source 20 40 mA
Sink TL103W/TL103WA 10 12
TL103WB 10 24
VCC+ = 15V, VO = 0.2V, VID = -1V Sink TL103W/TL103WA 12 50 μA
TL103WB 60 100
ISC Short-circuit to GND VCC+ = 15V ±40 ±68 mA
VO Voltage output swing from rail VCC+ = 30V, RL = 2kΩ Positive Rail (VCC+) TL103W/TL103WA 26 27 V
Full range 26
TL103WB 27.4 28.3
Full range 27.4
VCC+ = 30V, RL = 10kΩ Positive Rail (VCC+) TL103W/TL103WA 27 28
Full range 27
TL103WB 27.6 28.6
Full range 27.6
RL = 10kΩ Negative Rail (VCC-) 5 20 mV
Full range 20
SR Slew rate at unity gain VCC+ = 15V, CL = 100pF, RL = 2kΩ, VI = 0.5V to 2V, unity gain TL103W/TL103WA 0.2 0.4 V/µs
TL103WB 0.2 0.5
GBW Gain bandwidth product VCC+ = 30V, VI = 10mV, CL = 100pF, RL = 2kΩ, f = 100kHz TL103W/TL103WA 0.5(1) 0.9 MHz
VCC+ = 36V, VI = 10mV, CL = 100pF, RL = 2kΩ, f = 100kHz TL103WB 0.7(1) 1.2
THD Total harmonic distortion VCC+ = 30V, VO = 2VPP, CL = 100pF, RL = 2kΩ, f = 1kHz, AV = 20dB TL103W/TL103WA 0.02 %
VCC+ = 36V, VO = 2VPP, CL = 100pF, RL = 2kΩ, f = 1kHz, AV = 20dB TL103WB 0.005
Vn Equivalent input noise voltage VCC+ = 30V, RS = 100 Ω, f = 1kHz TL103W/TL103WA  50 nV/√Hz
VCC+ = 36V, RS = 100 Ω, f = 1kHz TL103WB  38
ICC Total supply current, excluding cathode-current reference (both amplifiers) VCC+ = 5V, no load TL103W/TL103WA 0.7 1.2 mA
VCC+ = 30V, no load Full range 2
VCC+ = 5V, no load TL103WB 0.55 0.77
VCC+ = 36V, no load Full range 1.35
(1) Not tested in production, limits set by characterization and simulation.