TL103WA 具有内部参考的双路运算放大器 | 德州仪器 TI.com.cn

TL103WA (正在供货) 具有内部参考的双路运算放大器

具有内部参考的双路运算放大器 - TL103WA
数据表
 

描述

The TL103W and TL103WA combine the building blocks of a dual operational amplifier and a fixed voltage reference – both of which often are used in the control circuitry of both switch-mode and linear power supplies. OP AMP1 has its noninverting input internally tied to a fixed 2.5-V reference, while OP AMP2 is independent, with both inputs uncommitted.

For the A grade, especially tight voltage regulation can be achieved through low offset voltages for both operational amplifiers (typically 0.5 mV) and tight tolerances for the voltage reference (0.4% at 25°C and 0.8% over operating temperature range).

The TL103W and TL103WA are characterized for operation from –40°C to 105°C.

特性

  • Operational Amplifier
    • Low Offset Voltage Max of:
      • TL103WA…3 mV (25°C) and 5 mV (Full Temperature)
      • TL103W…4 mV (25°C) and 5 mV (Full Temperature)
    • Low Supply Current…350 µA/Channel (Typ)
    • Unity Gain Bandwidth…0.9 MHz (Typ)
    • Input Common-Mode Range Includes GND
    • Large Output-Voltage Swing… 0 V to VCC – 1.5 V
    • Wide Supply-Voltage Range…3 V to 32 V
    • 2.5-kV ESD Protection (HBM)
  • Voltage Reference
    • Fixed 2.5-V Reference
    • Tight Tolerance Max of:
      • TL103WA…0.4% (25°C) and 0.8% (Full Temperature)
      • TL103W . . . 0.7% (25°C) and 1.4% (Full Temperature)
    • Low Temperature Drift…7 mV (Typ) Over Operating Temperature Range
    • Wide Sink-Current Range . . . 0.5 mA (Typ) to 100 mA
    • Output Impedance…0.2 Ω (Typ)
  • APPLICATIONS
    • Battery Chargers
    • Switch-Mode Power Supplies
    • Linear Voltage Regulation
    • Data-Acquisition Systems

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参数

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Part number 立即下单 Number of channels (#) Total supply voltage (Min) (+5V=5, +/-5V=10) Total supply voltage (Max) (+5V=5, +/-5V=10) GBW (Typ) (MHz) Slew rate (Typ) (V/us) Rail-to-rail Vos (offset voltage @ 25 C) (Max) (mV) Iq per channel (Typ) (mA) Vn at 1 kHz (Typ) (nV/rtHz) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Offset drift (Typ) (uV/C) Features Input bias current (Max) (pA) CMRR (Typ) (dB) Output current (Typ) (mA) Architecture
TL103WA 立即下单 2     3     32     0.9     0.4     In to V-     3     0.35     50     Catalog     -40 to 105     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)     7         150000     85     12     Bipolar    
TL103W 立即下单 2     3     32     0.9     0.4     In to V-     4     0.35     50     Catalog     -40 to 105     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)     7         150000     85     12     Bipolar