ZHCSTV0K November   2001  – December 2023 LP2992

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 描述
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Information
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Estimating Junction Temperature
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Noise Bypass Capacitor (CBYPASS)
      4. 7.1.4 Power Dissipation (PD)
      5. 7.1.5 Recommended Capacitor Types
      6. 7.1.6 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON/OFF Operation
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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订购信息

5.4 Electrical Characteristics

specified at TJ = 25°C, VIN = VOUT(nom) + 1.0 V or VIN = 2.5 V (whichever is greater), IOUT = 1 mA, VON/OFF = 2 V, CIN = 1.0 µF, and COUT = 2.2 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
∆VOUT Output voltage tolerance  IL = 1 mA Legacy chip (standard grade) –1.5 1.5 %
Legacy chip (A grade) –1.0 1.0
New chip –0.5 0.5
1 mA ≤ IL ≤ 50 mA Legacy chip (standard grade) –2.5 2.5
Legacy chip (A grade) –1.5 1.5
New chip –0.5 0.5
1 mA ≤ IL ≤ 50 mA, –40°C ≤ TJ ≤ 125°C Legacy chip (standard grade) –3.5 3.5
Legacy chip (A grade) –2.5 2.5
New chip –1 1
1 mA ≤ IL ≤ 250 mA Legacy chip (standard grade) –4 4
Legacy chip (A grade) –3.5 3.5
New chip –0.5 0.5
1 mA ≤ IL ≤ 250 mA, –40°C ≤ TJ ≤ 125°C Legacy chip (standard grade) –5 5
Legacy chip (A grade) –4.5 4.5
New chip –1 1
ΔVOUT(ΔVIN) Line regulation VO(NOM) + 1 V ≤ VIN ≤ 16 V Legacy chip 0.007 0.014 %/V
New chip 0.002 0.014
VO(NOM) + 1 V ≤ VIN ≤ 16 V, –40°C ≤ TJ ≤ 125°C Legacy chip 0.007 0.032
New chip 0.002 0.032
VIN(MIN) Minimum input voltage required to maintain output regulation Legacy chip 2.05 V
New chip 2.05
Minimum input voltage required to maintain output regulation –40°C ≤ TJ ≤ 125°C Legacy chip 2.2
New chip 2.35
IGND GND pin current IOUT = 0 mA Legacy chip 65 95 µA
New chip 69 95
IOUT = 0 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 125
New chip 123
IOUT = 1 mA Legacy chip 75 110
New chip 78 110
IOUT = 1 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 170
New chip 140
IOUT = 50 mA Legacy chip 350 600
New chip 380 440
IOUT = 50 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 1000
New chip 650
IOUT = 150 mA Legacy chip 850 1500
New chip 765 890
IOUT = 150 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 2500
New chip 1060
IOUT = 250 mA Legacy Chip 1500 2300
New Chip 875 1010
IOUT = 250 mA, –40°C ≤ TJ ≤ 125°C Legacy Chip 4000
New Chip 1200
VON/OFF < 0.3 V, VIN = 16 V Legacy chip 0.01 0.8
New chip 1.25 1.75
VON/OFF < 0.15 V, VIN = 16 V, –40°C ≤ TJ ≤ 125°C Legacy chip 0.05 2
New chip 1.12 2.75
VDO Dropout voltage(1) IOUT = 0 mA Legacy chip 0.5 2.5 mV
New chip 1 2.75
IOUT = 0 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 4
New chip 3
IOUT = 1 mA Legacy chip 5 9
New chip 11.5 14
IOUT = 1 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 12
New chip 17
IOUT = 50 mA Legacy chip 100 125
New chip 120 145
IOUT = 50 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 180
New chip 184
IOUT = 150 mA Legacy chip 260 325
New chip 180 198
IOUT = 150 mA, –40°C ≤ TJ ≤ 125°C Legacy chip 470
New chip 254
IOUT = 250 mA Legacy chip 450 575
New chip 225 260
IOUT = 250 mA,  –40°C ≤ TJ ≤ 125°C Legacy chip 850
New chip 340
VON/OFF ON/OFF input voltage Low = Output OFF Legacy chip 0.55 V
New chip 0.72
Low = Output OFF, VOUT + 1 ≤ VIN ≤ 16 V, –40°C ≤ TJ ≤ 125°C Legacy chip 0.15
New chip 0.15
High = Output ON Legacy chip 1.4
New chip 0.85
High = Output ON, VOUT + 1 ≤ VIN ≤ 16 V, –40°C ≤ TJ ≤ 125°C Legacy chip 1.6
New chip 1.6
ION/OFF ON/OFF input current VON/OFF = 0 V, VOUT + 1 ≤ VIN ≤ 16 V, –40°C ≤ TJ ≤ 125°C Legacy chip –2 µA
New chip –0.9
ION/OFF ON/OFF input current VON/OFF = 0 V Legacy chip 0.01 µA
New chip 0.42
IO(PK) Peak output current VOUT ≥ VO(NOM) –5% (steady state) Legacy chip 300 350 mA
New chip 300 350
IO(SC) Short output current RL = 0 Ω (steady state) Legacy chip 400
New chip 375
ΔVO/ΔVIN Ripple rejection f = 1 kHz, CBYPASS = 10 nF, COUT = 10 µF Legacy chip 45 dB
New chip 78
Vn Output noise voltage Bandwidth = 300 Hz to 50 kHz, CBYPASS = 10 nF, COUT = 2.2 µF, VOUT = 3.3 V Legacy chip 30 µVRMS
New chip 30
(1) Dropout voltage (VDO) is defined as the input-to-output differential at which the output voltage drops 100 mV below the value measured with a 1 V differential. VDO is measured with VIN = VOUT(nom) – 100 mV for fixed output devices.