ZHCSTV0K November   2001  – December 2023 LP2992

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 描述
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Information
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Estimating Junction Temperature
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Noise Bypass Capacitor (CBYPASS)
      4. 7.1.4 Power Dissipation (PD)
      5. 7.1.5 Recommended Capacitor Types
      6. 7.1.6 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON/OFF Operation
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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7.2.3 Application Curves

GUID-EF6A568D-8BFC-45EC-ACBD-0D6C2EAFCBF1-low.png
 
Figure 7-3 Load Transient Response for Legacy Chip
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Figure 7-5 Load Transient Response for Legacy Chip
GUID-564776FB-B70C-4AF7-875E-B0E63F4B3D1D-low.png
 
 
Figure 7-7 Line Transient Response for Legacy Chip
GUID-6DF6CCEE-9630-4C73-85C4-78D29DC8A5C5-low.png
 
 
Figure 7-9 Line Transient Response for Legacy Chip
GUID-26003740-F605-4B50-8AD1-341B2C7F5759-low.png
 
Figure 7-11 Turn-on Time for Legacy Chip
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Figure 7-13 Turn-on Time for Legacy Chip
GUID-20231130-SS0I-5WZF-C8TQ-TWNXCLPQLPCK-low.svg
dI/dt = 1 A/μ
Figure 7-4 Load Transient for New Chip
GUID-20231130-SS0I-HCSS-2ZDT-TRN7FRW8CVFD-low.svg
dI/dt = 1 A/μ
Figure 7-6 Load Transient Response for New Chip
GUID-20221126-SS0I-VKGW-HPKF-2JMGSFFL2BMF-low.svg
VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 1 mA,
dV/dt = 1 V/μ
Figure 7-8 Line Transient Response for New Chip
GUID-20221126-SS0I-X6LZ-F68H-KDXJXLHGHFR9-low.svg
VOUT = 3.3 V, CBYP = 0 nF, ΔVIN = 1 V, IOUT = 150 mA,
dV/dt = 1 V/μ
Figure 7-10 Line Transient Response for New Chip
GUID-20231130-SS0I-BBCD-Z3KM-BV4FWSVTVN8X-low.svg
 
Figure 7-12 Turn-on Time for New Chip
GUID-20231130-SS0I-F45Z-ZQLS-9JMKQM7SBLPK-low.svg
COUT = 4.7 μF
Figure 7-14 Turn-on Time for New Chip