ZHCSQT8 October   2023 LM74930-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Charge Pump
      2. 7.3.2  Dual Gate Control (DGATE, HGATE)
        1. 7.3.2.1 Load Disconnect Switch Control (HGATE, OUT)
        2. 7.3.2.2 Reverse Battery Protection (A, C, DGATE)
      3. 7.3.3  Overcurrent Protection (CS+, CS-, ILIM, IMON, TMR)
      4. 7.3.4  Overcurrent Protection with Circuit Breaker (ILIM, TMR)
      5. 7.3.5  Overcurrent Protection With Latch-Off
      6. 7.3.6  Short-Circuit Protection (ISCP)
        1. 7.3.6.1 Device Wake-Up With Output Short-Circuit Condition
      7. 7.3.7  Analog Current Monitor Output (IMON)
      8. 7.3.8  Overvoltage and Undervoltage Protection (OV, UVLO, OVCLAMP)
      9. 7.3.9  Disabling Reverse Current Blocking Functionality (MODE)
      10. 7.3.10 Device Functional Modes
        1. 7.3.10.1 Low Quiescent Current Shutdown Mode (EN)
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: 200-V Unsuppressed Load Dump Protection Application
      1. 8.2.1 Design Requirements for 200-V Unsuppressed Load Dump Protection
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  VS Capacitance, Resistor R1 and Zener Clamp (DZ)
        2. 8.2.2.2  Charge Pump Capacitance VCAP
        3. 8.2.2.3  Input and Output Capacitance
        4. 8.2.2.4  Overvoltage and Undervoltage Protection Component Selection
        5. 8.2.2.5  Selection of Scaling Resistor (RSET) and Short-Circuit Protection Setting Resistor (RSCP)
        6. 8.2.2.6  Overcurrent Limit (ILIM), Circuit Breaker Timer (TMR), and Current Monitoring Output (IMON) Selection
        7. 8.2.2.7  Selection of Current Sense Resistor, RSNS
        8. 8.2.2.8  Hold-Up Capacitance
        9. 8.2.2.9  MOSFET Q1 Selection
        10. 8.2.2.10 MOSFET Q2 Selection
        11. 8.2.2.11 Input TVS Selection
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Transient Protection
      2. 8.4.2 TVS Selection for 12-V Battery Systems
      3. 8.4.3 TVS Selection for 24-V Battery Systems
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

GUID-20220725-SS0I-G50S-9JDS-QNCCXGCVF4Q7-low.svgFigure 5-1 VQFN24-Pin RGETransparent Top View
Table 5-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMELM74930-Q1
RGE-24 (VQFN)
DGATE1ODiode Controller Gate Drive Output. Connect to the GATE of the external ideal diode MOSFET.
A2IAnode of the ideal diode. Connect to the source of the external ideal diode MOSFET.

SW

3IVoltage sensing disconnect switch terminal. A and SW are internally connected through a switch. Use SW as the top connection of the resistor ladder to measure voltage at the common source node. When EN is pulled low, the switch is OFF. If the internal disconnect switch between A and SW is not used then SW pin can be left floating.

UVLO

4IAdjustable undervoltage threshold input. Connect a resistor ladder across VIN to UVLO terminal to GND. When the voltage at UVLO goes below the undervoltage cut-off threshold then the HGATE is pulled low turning OFF the HSFET. HGATE turns ON when the sense voltage goes above the UVLO falling threshold.

When not used UVLO should be tied to VS or EN pin.

OV5IAdjustable overvoltage threshold input. Connect a resistor ladder across VIN/VOUT to OV terminal. When the voltage at OVP exceeds the overvoltage cut-off threshold then the HGATE is pulled low turning OFF the HSFET. HGATE turns ON when the sense voltage goes below the OVP falling threshold. When not used OV should be tied to ground.
EN6IEN Input. Connect to VS pin for always ON operation. Can be driven externally from a micro controller I/O. Pulling this pin low below V(ENF) makes the device enter into low Iq shutdown mode.

MODE

7

I

MODE input to disable reverse current blocking function of DGATE.

MODE pin can be driven from the microcontroller. When pulled low device disables reverse current blocking feature (DGATE).

When not used, MODE pin can be pulled to EN or VS.

N.C

8—

No Connection. Keep this pin floating.

TMR

9—Fault timer input. A capacitor across TMR pin to GND sets the times for fault warning, fault turn-off (FLT), and retry periods. Leave it open for fastest setting. Connect TMR to GND to disable overcurrent protection.

IMON

10

O

Analog current monitor output. This pin sources a scaled down ratio of current through the external current sense resistor RSENSE. A resistor from this pin to GND converts current to proportional voltage. If unused, leave this pin floating.

ILIM

11

—Overcurrent detection setting. A resistor across ILIM to GND sets the overcurrent comparator threshold. Connect ILIM to GND if overcurrent protection feature is not desired.

FLT

12OOpen drain fault output. FLT pin is pulled low in case of undervoltage, overvoltage, overcurrent and short circuit event.

GND

13

G

Connect to the system ground plane

HGATE

14

O

GATE driver output for the HSFET. Connect to the GATE of the external load switch MOSFET.

OUT

15

I

Connect to the common source rail (external load switch MOSFET source)

OVCLAMP

16

I

Connect this pin to OV pin for overvoltage clamp with circuit breaker (timer) functionality. Connect this pin to ground when not used.

N.C

17

—No Connection. Keep this pin floating.

ISCP

18

I

Short-circuit detection threshold setting. When ISCP is connected to C, device sets an internal fix threshold of 20 mV for output short circuit detection.

CS-

19

I

Current sense negative input.

CS+

20

I

Current sense positive input. Connect a 50-Ω resistor across CS+ to the external current sense resistor.

N.C

21

—No Connection. Keep this pin floating.

VS

22

P

Input power supply to the IC. Connect a 100-nF capacitor across VS and GND pin.

CAP

23

O

Internal charge pump output. Connect a 100-nF capacitor across CAP and VS pin.

C

24

I

Cathode of the ideal diode. Connect to the drain of the external ideal diode MOSFET.

RTN

Thermal pad

—Leave exposed pad floating. Do Not connect to GND plane.
(1) I = input, O = output, I/O = input and output, P = power, G = Ground