ZHCSEV5C February   2007  – January 2016 LM5109B

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-Up and UVLO
      2. 7.3.2 Level Shift
      3. 7.3.3 Output Stages
    4. 7.4 Device Functional Modes
    5. 7.5 HS Transient Voltages Below Ground
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 Select External Bootstrap Diode and Its Series Resistor
        3. 8.2.2.3 Selecting External Gate Driver Resistor
        4. 8.2.2.4 Estimate the Driver Power Loss
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

D Package
8-Pin SOIC
Top View
LM5109B 20211902.gif
NGT Package
8-Pin WSON
Top View
LM5109B 20211903.gif

Pin Functions

PIN DESCRIPTION
NO.(2) NAME TYPE(1)
1 VDD P Positive gate drive supply – Locally decouple to VSS using low ESR and ESL capacitor located as close to IC as possible.
2 HI I High-side control input – The HI input is compatible with TTL and CMOS input thresholds. Unused HI input must be tied to ground and not left open.
3 LI I Low-side control input – The LI input is compatible with TTL and CMOS input thresholds. Unused LI input must be tied to ground and not left open.
4 VSS G Ground – All signals are referenced to this ground.
5 LO O Low-side gate driver output – Connect to the gate of the low-side N-MOS device.
6 HS P High-side source connection – Connect to the negative terminal of the bootstrap capacitor and to the source of the high-side N-MOS device.
7 HO O High-side gate driver output – Connect to the gate of the high-side N-MOS device.
8 HB P High-side gate driver positive supply rail – Connect the positive terminal of the bootstrap capacitor to HB and the negative terminal of the bootstrap capacitor to HS. The bootstrap capacitor must be placed as close to IC as possible.
(1) G = Ground, I = Input, O = Output, and P = Power
(2) For 8-pin WSON package, TI recommends that the exposed pad on the bottom of the package be soldered to ground plane on the PCB and the ground plane must extend out from underneath the package to improve heat dissipation.