ZHCSEV5C February   2007  – January 2016 LM5109B

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-Up and UVLO
      2. 7.3.2 Level Shift
      3. 7.3.3 Output Stages
    4. 7.4 Device Functional Modes
    5. 7.5 HS Transient Voltages Below Ground
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 Select External Bootstrap Diode and Its Series Resistor
        3. 8.2.2.3 Selecting External Gate Driver Resistor
        4. 8.2.2.4 Estimate the Driver Power Loss
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VDD to VSS –0.3 18 V
HB to HS –0.3 18 V
LI or HI to VSS –0.3 VDD + 0.3 V
LO to VSS –0.3 VDD + 0.3 V
HO to VSS VHS – 0.3 VHB + 0.3 V
HS to VSS(2) –5 90 V
HB to VSS 108 V
Junction temperature –40 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD – 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VDD 8 14 V
HS(1) –1 90 V
HB VHS + 8 VHS + 14 V
HS slew rate 50 V/ns
Junction temperature –40 125 °C
(1) In the application, the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD – 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

6.4 Thermal Information

THERMAL METRIC(1) LM5109B UNIT
D (SOIC) NGT (WSON)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 117.6 42.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 64.9 34.0 °C/W
RθJB Junction-to-board thermal resistance 58.1 19.3 °C/W
ψJT Junction-to-top characterization parameter 17.4 0.4 °C/W
ψJB Junction-to-board characterization parameter 57.6 19.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance – 8.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

TJ = 25°C (unless otherwise specified), VDD = VHB = 12 V, VSS = VHS = 0 V, No Load on LO or HO
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IDD VDD quiescent current LI = HI = 0 V TJ = 25°C 0.3 mA
TJ = –40°C to 125°C 0.6
IDDO VDD operating current f = 500 kHz TJ = 25°C 1.8 mA
TJ = –40°C to 125°C 2.9
IHB Total HB quiescent current LI = HI = 0 V TJ = 25°C 0.06 mA
TJ = –40°C to 125°C 0.2
IHBO Total HB operating current f = 500 kHz TJ = 25°C 1.4 mA
TJ = –40°C to 125°C 2.8
IHBS HB to VSS current, quiescent VHS = VHB = 90 V TJ = 25°C 0.1 µA
TJ = –40°C to 125°C 10
IHBSO HB to VSS current, operating f = 500 kHz 0.5 mA
INPUT PINS LI AND HI
VIL Low level input voltage threshold TJ = 25°C 1.8 V
TJ = –40°C to 125°C 0.8
VIH High level input voltage threshold TJ = 25°C 1.8 V
TJ = –40°C to 125°C 2.2
RI Input pulldown resistance TJ = 25°C 200 kΩ
TJ = –40°C to 125°C 100 500
UNDERVOLTAGE PROTECTION
VDDR VDD rising threshold VDDR = VDD – VSS TJ = 25°C 6.7 V
TJ = –40°C to 125°C 6.0 7.4
VDDH VDD threshold hysteresis 0.5 V
VHBR HB rising threshold VHBR = VHB – VHS TJ = 25°C 6.6 V
TJ = –40°C to 125°C 5.7 7.1
VHBH HB threshold hysteresis 0.4 V
LO GATE DRIVER
VOLL Low-level output voltage ILO = 100 mA, VOHL = VLO – VSS TJ = 25°C 0.38 V
TJ = –40°C to 125°C 0.65
VOHL High-level output voltage ILO = −100 mA, VOHL = VDD – VLO TJ = 25°C 0.72 V
TJ = –40°C to 125°C 1.2
IOHL Peak pullup current VLO = 0 V 1 A
IOLL Peak pulldown current VLO = 12 V 1 A
HO GATE DRIVER
VOLH Low-level output voltage IHO = 100 mA, VOLH = VHO – VHS TJ = 25°C 0.38 V
TJ = –40°C to 125°C 0.65
VOHH High-level output voltage IHO = −100 mA, VOHH = VHB – VHO TJ = 25°C 0.72 V
TJ = –40°C to 125°C 1.2
IOHH Peak pullup current VHO = 0 V 1 A
IOLH Peak pulldown current VHO = 12 V 1 A

6.6 Switching Characteristics

TJ = 25°C (unless otherwise specified), VDD = VHB = 12 V, VSS = VHS = 0 V, No Load on LO or HO
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tLPHL Lower turnoff propagation delay
(LI falling to LO falling)		 TJ = 25°C 30 ns
TJ = –40°C to 125°C 56
tHPHL Upper turnoff propagation delay
(HI falling to HO falling)		 TJ = 25°C 30 ns
TJ = –40°C to 125°C 56
tLPLH Lower turnon propagation delay
(LI rising to LO rising)		 TJ = 25°C 32 ns
TJ = –40°C to 125°C 56
tHPLH Upper turnon propagation delay
(HI rising to HO rising)		 TJ = 25°C 32 ns
TJ = –40°C to 125°C 56
tMON Delay matching: Lower turnon and upper turnoff TJ = 25°C 2 ns
TJ = –40°C to 125°C 15
tMOFF Delay matching: Lower turnoff and upper turnon TJ = 25°C 2 ns
TJ = –40°C to 125°C 15
tRC, tFC Either output rise and fall time CL = 1000 pF 15 ns
tPW Minimum input pulse width that changes the output 50 ns
LM5109B 20211918.gif Figure 1. Typical Test Timing Diagram

6.7 Typical Characteristics

LM5109B 20211904.gif
Figure 2. VDD Operating Current vs Frequency
LM5109B 20211906.gif Figure 4. Operating Current vs Temperature
LM5109B 20211908.gif Figure 6. Quiescent Current vs Voltage
LM5109B 20211910.gif Figure 8. LO and HO High Level Output Voltage
vs Temperature
LM5109B 20211914.gif Figure 10. Undervoltage Rising Thresholds
vs Temperature
LM5109B 20211916.gif Figure 12. Input Thresholds vs Temperature
LM5109B 20211905.gif
VDD = VHB = 12 V VSS = VHS = 0 V
Figure 3. HB Operating Current vs Frequency
LM5109B 20211907.gif Figure 5. Quiescent Current vs Temperature
LM5109B 20211909.gif Figure 7. Propagation Delay vs Temperature
LM5109B 20211911.gif Figure 9. LO and HO Low Level Output Voltage
vs Temperature
LM5109B 20211915.gif Figure 11. Undervoltage Hysteresis vs Temperature
LM5109B 20211917.gif Figure 13. Input Thresholds vs Supply Voltage