SNVS782C October   2010  – August 2015 LM3243

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 ACB
      2. 7.3.2 Bypass Operation
      3. 7.3.3 Mode Pin
      4. 7.3.4 Dynamic Adjustment Of Output Voltage
      5. 7.3.5 Internal Synchronous Rectification
      6. 7.3.6 Current Limit
      7. 7.3.7 Timed Current Limit
      8. 7.3.8 Thermal Overload Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Operation
      2. 7.4.2 PFM Mode
      3. 7.4.3 Mode Selection
      4. 7.4.4 Shutdown Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Capacitor Selection
        3. 8.2.2.3 Setting The Output Voltage
          1. 8.2.2.3.1 DAC Control
          2. 8.2.2.3.2 PDM-Based VCON Signal
          3. 8.2.2.3.3 VCON Pin
        4. 8.2.2.4 EN Input Control
        5. 8.2.2.5 Start-Up
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Considerations
        1. 10.1.1.1 Energy Efficiency
        2. 10.1.1.2 EMI
      2. 10.1.2 Manufacturing Considerations
    2. 10.2 Layout Example
      1. 10.2.1 LM3243 RF Evaluation Board
      2. 10.2.2 DC-DC Converter Section
      3. 10.2.3 VBATT Star Supply Connection
    3. 10.3 DSBGA Package Assembly and Use
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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7 Detailed Description

7.1 Overview

The LM3243 is a high-efficiency step-down DC-DC converter optimized to power the RF power amplifier (PA) in cell phones, portable communication devices, or battery-powered RF devices with a single Li-Ion battery. It operates in fixed-frequency pulse width modulation (PWM) mode for 2G transmissions (with MODE = LOW), automatic mode transition between PFM and PWM mode for 3G/4G RF PA operation (with MODE = HIGH), forced bypass mode (with BP = HIGH), or in shutdown mode (with EN = LOW).

The fixed-frequency PWM mode provides high efficiency and very low output voltage ripple. In PFM mode, the converter operates with reduced switching frequencies and lower supply current to maintain high efficiencies. The forced bypass mode allows the user to drive the output directly from the input supply through a bypass FET. The shutdown mode turns the LM3243 off and reduces current consumption to 0.02 µA (typical).

In PWM and PFM modes of operation, the output voltage of the LM3243 can be dynamically programmed from 0.4 V to 3.6 V (typical) by adjusting the voltage on VCON. Current overload protection and thermal overload protection are also provided.

The LM3243 was engineered with Active Current assist and analog Bypass (ACB). This unique feature allows the converter to support maximum load currents of 2.5 A (minimum) while keeping a small footprint inductor and meeting all of the transient behaviors required for operation of a multi-mode RF Power Amplifier. The ACB circuit provides an additional current path when the load current exceeds 1.4 A (typical) or as the switcher approaches dropout. Similarly, the ACB circuit allows the converter to respond with faster VCON output voltage transition times by providing extra output current on rising and falling output edges. The ACB circuit also performs the function of analog bypass. Depending upon the input voltage, output voltage and load current, the ACB circuit automatically and seamlessly transitions the converter into analog bypass while maintaining output voltage regulation and low output voltage ripple. Full bypass (100% duty cycle operation) will occur if the total dropout resistance in bypass mode (Rtot_drop = 45 mΩ) is insufficient to regulate the output voltage.

The LM3243 device’s 16-pin DSBGA package is the best solution for space-constrained applications such as cell phones and other hand-held devices. The high switching frequency, 2.7 MHz (typical) in PWM mode, reduces the size of input capacitors, output capacitors and of the inductor. Use of a DSBGA package is best suited for opaque case applications and requires special design considerations for implementation. (Refer to DSBGA Package Assembly and Use.) Because the LM3243 does not implement UVLO, the system controller should set EN = LOW during power-up and UVLO conditions. (Refer to Shutdown Mode).

7.2 Functional Block Diagram

LM3243 FBD_snvs782.gif

7.3 Feature Description

7.3.1 ACB

The 3GPP time mask requirement for 2G requires high current to be sourced by the LM3243. These high currents are required for a small time during transients or under a heavy load. Over-rating the switching inductor for these higher currents would increase the solution size and will not be an optimum solution. Thus, to allow an optimal inductor size for such a load, an alternate current path is provided from the input supply through the ACB pin. Once the switcher current limit ILIM,PFET,SteadyState is reached, the ACB circuit starts providing the additional current required to support the load. The ACB circuit also minimizes the dropout voltage by having the analog bypass FET in parallel with VOUT. The LM3243 can provide up to 2.5 A (minimum) of current in bypass mode with a 4-A (maximum) peak current limit.

7.3.2 Bypass Operation

The Bypass circuit provides an analog bypass function with very low dropout resistance (Rtot_drop = 45 mΩ typical). When BP = LOW the part will be in automatic bypass mode which will automatically determine the amount of bypass needed to maintain voltage regulation. When the input supply voltage to the LM3243 is lowered to a level where the commanded duty cycle is higher than what the converter is capable of providing, the part will go into pulse-skipping mode. The switching frequency will be reduced to maintain a low and well-behaved output voltage ripple. The analog bypass circuit will allow the converter to stay in regulation until full bypass is reached (100% duty cycle operation). The converter comes out of full bypass and back into analog bypass regulation mode with a similar reverse process.

To override the automatic bypass mode, either set VCON > (VIN)/(2.5) (but less than VIN) or set BP = HIGH for forced bypass function. Forced bypass function is valid for 2.7 V < VIN < 5.5 V.

7.3.3 Mode Pin

The MODE pin changes the state of the converter to one of the two allowed modes of operation. Setting the MODE pin HIGH (> 1.2 V) sets the device for automatic transition between pulse frequency modulation (PFM) and PWM mode operation. In this mode, the converter operates in PFM mode to maintain the output voltage regulation at very light loads and transitions into PWM mode at loads exceeding 95 mA (typical). The PWM switching frequency is 2.7 MHz (typical). Setting the MODE pin LOW (< 0.5 V) sets the device for PWM mode operation. The switching operation is in PWM mode only, and the switching frequency is also 2.7 MHz (typical).

7.3.4 Dynamic Adjustment Of Output Voltage

The output voltage of the LM3243 can be dynamically adjusted by changing the voltage on the VCON pin. In RF PA applications, peak power is required when the handset is far away from the base station. To maximize the power savings, the LM3243 output should be set just high enough to achieve the desired PA linearity. Hence, during low-power requirements, reduction of supply voltage to the PA can reduce power consumption from the PA, making the operation more efficient and promote longer battery life. Please refer to Setting The Output Voltage for further details.

7.3.5 Internal Synchronous Rectification

The LM3243 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop, thus increasing efficiency. The reduced forward voltage drop in the internal NFET synchronous rectifier significantly improves efficiency for low output voltage operation. The NFET is designed to conduct through its intrinsic body diode during the transient intervals, eliminating the need of an external diode.

7.3.6 Current Limit

The LM3243 current limit feature protects the converter during current overload conditions. Both SW and ACB pins have positive and negative current limits. The positive and negative current limits bound the SW and ACB currents in both directions. The SW pin has two positive current limits. The ILIM,PFET,SteadyState current limit triggers the ACB circuit. Once the peak inductor current exceeds ILIM,PFET,SteadyState, the ACB circuit starts assisting the switcher and provides just enough current to keep the inductor current from exceeding ILIM,PFET,SteadyState allowing the switcher to operate at maximum efficiency. Transiently a second current limit ILIM,PFET,Transient of 1.9 A (typical) or 2.1 A (maximum) limits the maximum peak inductor current possible. The output voltage will fall out of regulation only after both SW and ACB output pin currents reach their respective current limits of ILIM,PFET,Transient and ILIM,P-ACB.

7.3.7 Timed Current Limit

If the load or output short circuit pulls the output voltage to 0.3 V or lower and the peak inductor current sustains ILIM, PFET Transient more than 10 µs, the LM3243 switches to a timed current limit mode. In this mode, the internal PFET switch is turned off. After approximately 30 µs, the device will return to the normal operation.

7.3.8 Thermal Overload Protection

The LM3243 device has a thermal overload protection that protects itself from short-term misuse and overload conditions. If the junction temperature exceeds 150°C, the LM3243 shuts down. Normal operation resumes after the temperature drops below 130°C. Prolonged operation in thermal overload condition may damage the device and is therefore not recommended.

7.4 Device Functional Modes

7.4.1 PWM Operation

When the LM3243 operates in PWM mode, the switching frequency is constant, and the switcher regulates the output voltage by changing the energy-per-cycle to support the load required. During the first portion of each switching cycle, the control block in the LM3243 turns on the internal PFET switch. This allows current to flow from the input through the inductor and to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of (VIN – VOUT)/L, by storing energy in its magnetic field.

During the second portion of each cycle, the control block turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the NFET and to the output filter capacitor and load, which ramps the inductor current down with a slope of –VOUT/L. The output filter capacitor stores charge when the inductor current is greater than the load current and releases it when the inductor current is less than the load current, smoothing the voltage across the load.

At the next rising edge of the clock, the cycle repeats. An increase of load pulls the output voltage down, increasing the error signal. As the error signal increases, the peak inductor current becomes higher, thus increasing the average inductor current. The output voltage is therefore regulated by modulating the PFET switch on-time to control the average current sent to the load. The circuit generates a duty-cycle modulated rectangular signal that is averaged using a low pass filter formed by the inductor and output capacitor. The output voltage is equal to the average of the duty-cycle modulated rectangular signal.

7.4.2 PFM Mode

With MODE = HIGH, the LM3243 automatically transitions to from PWM into PFM operation if the average inductor current is less than 75 mA (typical) and VIN − VOUT > 0.6 V. The switcher regulates the fixed output voltage by transferring a fixed amount of energy during each cycle and modulating the frequency to control the total power delivered to the output. The converter switches only as needed to support the demand of the load current, therefore maximizing efficiency. If the load current should increase during PFM mode to more than 95 mA (typical), the part will automatically transition into constant frequency PWM mode. A 20 mA (typical) hysteresis window exists between PFM and PWM transitions.

After a transient event, the part temporarily operates in 2.7 MHz (typical) fixed-frequency PWM mode to quickly charge or discharge the output. This is true for start-up conditions or if MODE pin is toggled LOW-to-HIGH. Once the output reaches its target output voltage, and the load is less than 75 mA (typical), then the part will seamlessly transition into PFM mode (assuming it is not in forced bypass or auto bypass condition).

7.4.3 Mode Selection

Table 1 shows the LM3243 parameters for the given modes (PWM or PFM/PWM).

Table 1. Parameters Under Different Modes

PARAMETER/MODE PWM PFM/PWM
MODE pin LOW HIGH
BP pin LOW LOW
Frequency at loads = 75 mA (typical) 2.7 MHz (typical) Variable
Frequency at loads = 95 mA (typical) 2.7 MHz (typical) 2.7 MHz (typical)
VOUT 2.5 × VCON 2.5 × VCON
Maximum load steady state 2.5 A (min.) 75 mA (minimum in PFM) or 2.5 A (minimum in PWM)

7.4.4 Shutdown Mode

To shut down the LM3243 pull the EN pin LOW (< 0.5 V). In shutdown mode, the current consumption is 0.02 µA (typical) and the PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuit are turned OFF. To enable LM3243 pull EN HIGH (> 1.2V ), and the mode of operation will be dependent on the voltage applied to the MODE pin.

Since the LM3243 does not feature a undervoltage lock-out (UVLO) circuit, the EN pin should be set LOW to turn off the LM3243 during power up and during UVLO conditions. For cell-phone applications, the system controller determines the power supply sequence; thus, it is up to the system controller to ensure proper sequencing by using all of the available pins and functions properly.