ZHCSDW9B May   2015  – March 2016 DRV421

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fluxgate Sensor
      2. 7.3.2  Integrator-Filter Function and Compensation Loop Stability
      3. 7.3.3  H-Bridge Driver for Compensation Coil
      4. 7.3.4  Shunt Sense Amplifier
      5. 7.3.5  Overrange Comparator
      6. 7.3.6  Voltage Reference
      7. 7.3.7  Overload Detection and Control
      8. 7.3.8  Magnetic Core Demagnetization
      9. 7.3.9  Search Function
      10. 7.3.10 Error Flag
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Magnetic Core Design
      2. 8.1.2 Protection Recommendations
    2. 8.2 Typical Application
      1. 8.2.1 Closed-Loop Current Sensing Module
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Differential Closed-Loop Current Sensing Module
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Using the DRV421 in ±15-V Sensor Applications
  9. 9 Power-Supply Recommendations
    1. 9.1 Power-Supply Decoupling
    2. 9.2 Power-On Start Up and Brownout
    3. 9.3 Power Dissipation
      1. 9.3.1 Thermal Pad
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档　
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Power-Supply Recommendations

9.1 Power-Supply Decoupling

Decouple both VDD pins of the DRV421 with 1-uF X7R-type ceramic capacitors to the adjacent GND pin as illustrated in Figure 71. For best performance, place both decoupling capacitors as close to the related power-supply pins as possible. Connect these capacitors to the power-supply source in a way that allows the current to flow through the pads of the decoupling capacitors.

9.2 Power-On Start Up and Brownout

Power-on is detected when the supply voltage exceeds 2.4 V at VDD pin. At this point, DRV421 initiates following start-up sequence:

  1. Digital logic starts up and waits for 26 μs for the supply to settle.
  2. Fluxgate sensor powers up.
  3. If fluxgate sensor saturation is detected, search function starts as described in the Search Function section.
  4. If DEMAG pin is set high, demagnetization cycle starts as described in the Magnetic Core Demagnetization section.
  5. The compensation loop is active after the demagnetization cycle, or 80 μs after the supply voltage exceeds 2.4 V.

During this startup sequence, the ICOMP1 and ICOMP2 outputs are pulled low to prevent undesired signals on the compensation coil, and the ER pin is asserted low.

The DRV421 tests for low supply voltages with a brownout voltage level of 2.4 V. Use a power-supply source capable of supporting large current pulses driven by the DRV421, and low ESR bypass capacitors for stable supply voltage in the system. A supply drop below 2.4-V that lasts longer than 20 μs generates a power-on reset; the device ignores shorter voltage drops. A voltage drop on the VDD pin to below 1.8 V immediately initiates a power-on reset. After the power supply returns to 2.4 V, the device initiates a start-up cycle, as described at the beginning of this section.

9.3 Power Dissipation

The thermally-enhanced, PowerPAD, WQFN package reduces the thermal impedance from junction to case. This package has a downset lead frame on which the die is mounted. The lead frame has an exposed thermal pad (PowerPAD) on the underside of the package, and provides a good thermal path for the heat dissipation.

The power dissipation on both linear outputs ICOMP1 and ICOMP2 is calculated with Equation 8:

Equation 8. PD(ICOMP) = IICOMP × (VICOMP – VSUPPLY)

where

  • VSUPPLY = voltage potential closer to VICOMP, VDD, or GND

CAUTION

Output short-circuit conditions are particularly critical for the H-bridge driver output pins ICOMP1 and ICOMP2. The full supply voltage occurs across the conducting transistor and the current is only limited by the current density limitation of the FET; permanent damage can occur. The DRV421 does not feature temperature protection or thermal shut-down.

9.3.1 Thermal Pad

Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but board layout greatly influences the overall heat dissipation. Technical details are described in application report SLMA002, PowerPad Thermally Enhanced Package, available for download at www.ti.com.