ZHCS597B
December 2011 – May 2015
DAC1282
PRODUCTION DATA.
1
特性
2
应用
3
说明
4
修订历史记录
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Thermal Information
7.4
Electrical Characteristics
7.5
Timing Requirements: Serial Peripheral Interface (SPI) Timing
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Feature Description
8.2.1
Signal Output (VOUTP, VOUTN)
8.2.2
DAC Modes
8.2.2.1
Sine Mode
8.2.2.2
DC Mode
8.2.2.3
Pulse Mode
8.2.2.4
Digital Data Mode
8.2.3
Reference Voltage (VREF)
8.2.4
Output Filter (CAPP, CAPN)
8.2.5
Output Switch (SWINP, SWINN, SWOUTP, SWOUTN)
8.2.6
Clock Input (CLK)
8.2.7
Switch Control/External Digital Input (SW/TD)
8.2.7.1
SW Function
8.2.7.2
TD Function
8.2.8
SYNC
8.2.9
RESET/PWDN
8.2.10
AVDD, AVSS, and DVDD Power Supplies
8.2.10.1
Power Consumption
8.2.10.2
Offset and Gain Error
8.2.10.3
Signal-to-Noise Ratio (SNR)
8.2.10.4
DC Noise
8.2.10.5
Total Harmonic Distortion (THD)
8.2.11
Step Response
8.2.12
Frequency Response
8.3
Device Functional Modes
8.3.1
Serial Interface
8.3.1.1
Serial Communications
8.3.1.2
Chip Select (CS)
8.3.1.3
Serial Clock (SCLK)
8.3.1.4
Data Input (DIN)
8.3.1.5
Data Output (DOUT)
8.3.2
SPI Timeout
8.4
Programming
8.4.1
Commands
8.4.1.1
RREG: Read From Registers
8.4.1.2
WREG: Write To Registers
8.4.1.3
RESET: Device Reset
8.5
Register Map
8.5.1
Register Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Single-Channel Seismic System
9.2.2
Four-Channel Seismic System
10
器件和文档支持
10.1
Community Resources
10.2
商标
10.3
静电放电警告
10.4
术语表
11
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
PW|24
MPDS363A
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcs597b_oa
zhcs597b_pm
5 Device Comparison
DEVICE
DESCRIPTION
ADS1281
High-resolution ADC
ADS1282
High-resolution ADC with PGA
REF5050
Low-drift 5 V reference