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MCU-PLUS-SDK-AM64X

适用于 AM64x 的 MCU+ SDK RTOS/NO-RTOS

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最新版本
版本: 09.01.00.41
发布日期: 13 十二月 2023
产品
基于 Arm 的处理器
AM6411 单核 64 位 Arm® Cortex®-A53,单核 Cortex-R5F,具有 PCIe、USB 3.0 和安全性 AM6412 双核 64 位 Arm® Cortex®-A53,单核 Cortex-R5F,具有 PCIe、USB 3.0 和安全性 AM6421 单核 64 位 Arm® Cortex®-A53,双核 Cortex-R5F,具有 PCIe、USB 3.0 和安全性 AM6441 单核 64 位 Arm® Cortex®-A53,四核 Cortex-R5F,具有 PCIe、USB 3.0 和安全性 AM6442 双核 64 位 Arm® Cortex®-A53,四核 Cortex-R5F,具有 PCIe、USB 3.0 和安全性 AM6422 双核 64 位 Arm® Cortex®-A53,双核 Cortex-R5F,具有 PCIe、USB 3.0 和安全性

文档

Documentation - START HERE

Download CCS 12.5.0 Version for Windows or Linux

Download TI ARM CLANG 3.2.0 LTS for Windows or Linux

Download SysConfig 1.18.0 for Windows or Linux

发布信息

Thank you for your interest in the AM64x MCU PLUS Software Development Kit (SDK). This software accelerates application development schedules by eliminating the need to create basic system software functions from scratch.

  • The SDK includes a real-time multitasking kernel, network communications support, examples, and drivers.
  • The exact content of the SDK depends on the capabilities of the device, but all devices share common APIs and build on existing proven software components to ensure reliability and quality.
  • The software components are fully tested to ensure that they work together with TI’s Code Composer Studio integrated development environment
  • Limited testing on SK-AM64 board

最新动态

  • Memory Configurator (SysConfig based Linker generation)
  • McSPI and UART LLD driver support
  • SafeIPC support
  • Uniflash tool support
  • PRU IO serial interface multi channel implementation supporting ADS131M08 IC (32 KSPS)
  • LwIP stack is upgraded to 2.2.0 version
  • YANG data model based configuration support for IET/Frame Preemption(IEEE 802.1Qbu), Credit Based Shaper(IEEE 802.1Qav), Enhancements for Scheduled Traffic(IEEE 802.1Qbv) and other TSN features
  • Ethernet Switch management through standard Link Layer Discovery Protocol(IEEE 802.1AB) for CPSW peripheral, Multi-time domain gPTP(IEEE 802.1AS) support enabled in Time-Sensitive Networking stack
  • Support to enable both ICSSG peripherals, Support to enable upto five MAC ports using both CPSW and ICSSG peripherals on different cores