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TPS7A49

現行

具啟用功能的 150-mA、36-V、低雜訊、高 PSRR 可調式低壓降電壓穩壓器

產品詳細資料

Rating Catalog Vin (max) (V) 36 Vin (min) (V) 3 Iout (max) (A) 0.15 Output options Adjustable Output Vout (max) (V) 33 Vout (min) (V) 1.2 Noise (µVrms) 15 PSRR at 100 KHz (dB) 54 Iq (typ) (mA) 0.06 Features Enable, Soft start Thermal resistance θJA (°C/W) 48 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 260 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 36 Vin (min) (V) 3 Iout (max) (A) 0.15 Output options Adjustable Output Vout (max) (V) 33 Vout (min) (V) 1.2 Noise (µVrms) 15 PSRR at 100 KHz (dB) 54 Iq (typ) (mA) 0.06 Features Enable, Soft start Thermal resistance θJA (°C/W) 48 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 260 Operating temperature range (°C) -40 to 125
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 VSON (DRB) 8 9 mm² 3 x 3
  • Input Voltage Range: 3 V to 36 V
  • Noise:
    • 12.7 µVRMS (20 Hz to 20 kHz)
    • 15.4 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (120 Hz)
    • ≥ 52 dB (10 Hz to 400 kHz)
  • Adjustable Output: 1.194 V to 33 V
  • Output Current: 150 mA
  • Dropout Voltage: 260 mV at 100 mA
  • Stable with Ceramic Capacitors ≥ 2.2 µF
  • CMOS Logic-Level-Compatible Enable Pin
  • Fixed Current-Limit and Thermal Shutdown Protection
  • Packages: 8-Pin HVSSOP PowerPAD™ and
    3-mm × 3-mm VSON
  • Operating Temperature Range:
    –40°C to 125°C
  • Input Voltage Range: 3 V to 36 V
  • Noise:
    • 12.7 µVRMS (20 Hz to 20 kHz)
    • 15.4 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (120 Hz)
    • ≥ 52 dB (10 Hz to 400 kHz)
  • Adjustable Output: 1.194 V to 33 V
  • Output Current: 150 mA
  • Dropout Voltage: 260 mV at 100 mA
  • Stable with Ceramic Capacitors ≥ 2.2 µF
  • CMOS Logic-Level-Compatible Enable Pin
  • Fixed Current-Limit and Thermal Shutdown Protection
  • Packages: 8-Pin HVSSOP PowerPAD™ and
    3-mm × 3-mm VSON
  • Operating Temperature Range:
    –40°C to 125°C

The TPS7A49 series of devices are positive, high-voltage (36 V), ultralow-noise (15.4 µVRMS, 72-dB PSRR) linear regulators that can source a 150-mA load.

These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other available features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.

The TPS7A49 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A49 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider TI’s TPS7A30xx family of negative high-voltage, ultralow-noise linear regulators as well.

The TPS7A49 series of devices are positive, high-voltage (36 V), ultralow-noise (15.4 µVRMS, 72-dB PSRR) linear regulators that can source a 150-mA load.

These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other available features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.

The TPS7A49 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A49 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.

For applications where positive and negative high-performance rails are required, consider TI’s TPS7A30xx family of negative high-voltage, ultralow-noise linear regulators as well.

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類型 標題 日期
* Data sheet TPS7A49 36-V, 150-mA, Ultralow-Noise, Positive Linear Regulator datasheet (Rev. E) PDF | HTML 2015年 5月 26日
Application note An empirical analysis of the impact of board layout on LDO thermal performance (Rev. A) PDF | HTML 2025年 9月 23日
White paper Demystifying LDO Turn-On (startup) Time PDF | HTML 2024年 10月 5日
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 2022年 12月 14日
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 2022年 12月 13日
Application note A Topical Index of TI LDO Application Notes (Rev. F) 2019年 6月 27日
Application note Accurate Thermal Calculations on the Back of a Napkin 2019年 6月 3日
E-book LDO Basics (Rev. A) 2019年 4月 8日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 2018年 3月 21日
Technical article LDO basics: dropout PDF | HTML 2017年 3月 16日
EVM User's guide TPS7A30-49EVM-567 User's Guide 2010年 8月 27日

設計與開發

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開發板

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使用指南: PDF
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開發板

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The TPS7A30-49EVM-567 is a fully assembled and tested circuit for evaluating the TPS7A3001 and TPS7A4901 low-dropout linear regulators in the DGN (3mm x 5mm MSOP-8) package. The TPS7A30-49EVM-567 includes two independent circuits with outputs of –15 V and +15 V (respectively). These (...)
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我們的 TI-PMLK LDO 實驗電路板隸屬於 TI 電源管理實驗套件 (TI-PMLK) 系列。TI-PMLK 系列提供動手實作的學習方式,以加強對電源供應知識的理解。模組化格式可讓您依自身需求客製化 TI-PMLK 系列的學習體驗,以達到對電源設計理解的最大效益。TI-PMLK LDO 實驗電路板採用 TPS7A4901 和 TPS7A8300 低壓降 (LDO) 電壓穩壓器。TI-PMLK LDO 實驗手冊 (PMLKLDOEVMB) 涵蓋理論與實驗內容,包括針對穩態、暫態與動態條件的各種測試,模擬實際應用情境。

使用指南: PDF
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模擬型號

TPS7A4901 PSpice Transient Model (Rev. B)

SBVM024B.ZIP (47 KB) - PSpice Model
模擬型號

TPS7A4901 PSpice Transient Model (Rev. C)

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模擬型號

TPS7A4901 TINA-TI Transient Reference Design (Rev. A)

SBVM217A.TSC (105 KB) - TINA-TI Reference Design
模擬型號

TPS7A4901 TINA-TI Transient Spice Model (Rev. A)

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模擬型號

TPS7A4901 Unencrypted PSpice Transient Model (Rev. A)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
HVSSOP (DGN) 8 Ultra Librarian
VSON (DRB) 8 Ultra Librarian

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