TPS54229E
- D-CAP2™ Mode Enables Fast Transient Response
- Low Output Ripple and Allows Ceramic Output Capacitor
- Wide VIN Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.76 V to 7.0 V
- Highly Efficient Integrated FETs Optimized
for Lower Duty Cycle Applications
– 160 mΩ (High Side) and 110 mΩ (Low Side) - High Efficiency, less than 10 µA at shutdown
- High Initial Bandgap Reference Accuracy
- Adjustable Soft Start
- Pre-Biased Soft Start
- 650-kHz Switching Frequency (fSW)
- Cycle By Cycle Over Current Limit
- Auto-Skip Eco-mode™ for High Efficiency at Light Load
The TPS54229E is an adaptive on-time D-CAP2 mode synchronous buck converter. The TPS54229E enables system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54229E uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode™ operation at light loads. Eco-mode™ allows the TPS54229E to maintain high efficiency during lighter load conditions. The TPS54229E also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54229E is available in the 8-pin DDA package, and designed to operate from –40°C to 85°C.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 4.5-V to 18-V Input, 2-A Synchronous Step-Down Converter with Eco-mode™ datasheet (Rev. A) | 2012/3/23 | |||
| 應用說明 | D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- | 2013/1/2 | ||||
| 更多文件說明 | TPS54229EEVM-056, 2-A, SWIFT(TM) Regulator Evaluation Module | 2011/10/21 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HSOIC (DDA) | 8 | Ultra Librarian |
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