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即時數位電源 MCU
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AM2611

現行

基於 Arm® Cortex®-R5F 的 500MHz 單核心 MCU，具備即時控制、安全與保全功能

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產品規格表

AM2611

現行
產品規格表 立即訂購

產品詳細資料

CPU Arm Cortex-R5F Frequency (MHz) 500 RAM (kByte) 1024, 1536 ADC type 12-bit SAR Features Automation, EtherCAT, EtherNet/IP, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), Integrated industrial protocols, Profinet, Robotics UART 6 CAN (#) 2, CAN-FD PWM (Ch) 20 TI functional safety category Functional Safety-Compliant SPI 2, 4 Hardware accelerators Trigonometric math accelerator Edge AI enabled Yes Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface ADC, CAN, CAN-FD, Ethernet, GPIO, I2C, OSPI, SD/SDIO, SPI, UART, eCAP, ePWM, eQEP Number of GPIOs 1, 140 Number of I2Cs 3
CPU Arm Cortex-R5F Frequency (MHz) 500 RAM (kByte) 1024, 1536 ADC type 12-bit SAR Features Automation, EtherCAT, EtherNet/IP, External memory interface, Hardware encrpytion (AES/DES/SHA/MD5), Integrated industrial protocols, Profinet, Robotics UART 6 CAN (#) 2, CAN-FD PWM (Ch) 20 TI functional safety category Functional Safety-Compliant SPI 2, 4 Hardware accelerators Trigonometric math accelerator Edge AI enabled Yes Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface ADC, CAN, CAN-FD, Ethernet, GPIO, I2C, OSPI, SD/SDIO, SPI, UART, eCAP, ePWM, eQEP Number of GPIOs 1, 140 Number of I2Cs 3
NFBGA (ZEJ) 256 169 mm² (13 mm × 13 mm) NFBGA (ZNC) 293 100 mm² (10 mm × 10 mm) NFBGA (ZCZ) 324 225 mm² (15 mm × 15 mm) NFBGA (ZFG) 304 175.5625 mm² (13.25 mm × 13.25 mm)

Processor Cores:

  • Single and Dual Arm Cortex R5F CPU with each core running up to 500MHz
    • 16KB I-Cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • 256KB Tightly Coupled Memory (TCM) with 32-bit ECC per core
    • Lockstep or Dual-core operation supported
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 2x, one per R5F MCU core

Memory:

  • 1.5MB of On-Chip Shared RAM (OCSRAM):
    • 3 banks × 512KB
    • ECC error protection for full 1.5MB OCSRAM

    • Remote L2 Cache (RL2) for external memory, software programmable up to 256KB per CPU core

  • 2x Octal Serial Peripheral Interface (OSPI) up to 133MHz SDR and DDR
    • 1x with eXecute In Place (XIP) support

    • RAM expansion/Flash over the Air (FOTA)

  • General-Purpose Memory Controller (GPMC)
    • 16-bit parallel data bus with 22-bit address bus and 4 chip selects
    • Up to 4MB addressable memory space
    • Integrated Error Location Module (ELM) support for error checking

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)

    • OSPI NOR and NAND Flash (50MHz SDR and 25MHz DDR) (Primary)

    • USB Peripheral boot
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 2x Windowed Watchdog Timer (WWDT)
    • 4x Real Time Interrupt (RTI) timer

USB 2.0

  • Port configurable as USB host, USB device, or USB Dual-Role device
  • USB 2.0 Host mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)
    • Low-Speed (LS, 1.5Mbps)
  • USB 2.0 Device mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)

Industrial Connectivity:

  • 2x Programmable Real-time Unit – Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Realtime Unit Subsystem (PRU0 / PRU1) per PRU-ICSS for 4 cores total
      • Deterministic hardware
      • Dynamic firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 12KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™
      • PROFINET, IO-Link
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High Speed Interfaces

  • Integrated 3-port Gigabit Ethernet Switch (CPSW) supporting up to two external ports
    • Selectable MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine based packet classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/ UDP/ TCP checksum offload in hardware
    • Time Sensitive Network (TSN) Support
    • Cut-thru switching and Interexpress Traffic (IET) support

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 4x Serial Peripheral Interface (SPI) controllers
  • 3x Local Interconnect Network (LIN) ports
  • 3x Inter-Integrated Circuit (I2C) ports
  • 2x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 1x Fast Serial Interface Transmitter (FSITX)
  • 1x Fast Serial Interface Receiver (FSIRX)
  • Up to 141x General Purpose I/O (GPIO) pins

Sensing and Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 3x 12-bit Analog to Digital Converters (ADC) with 3 MSPS maximum sampling rate
    • Each ADC module with
      • 7x Single ended channels OR
      • 3x Differential channels
    • Highly configurable ADC digital logic
      • With selectable internal or external reference
      • 4x Post-Processing blocks for each ADC module
  • 9x Analog Comparators with internal 12-bit DAC reference (CMPSSA)
  • 1x 12 bit Digital to Analog Converter (DAC)
  • 10x Enhanced High Resolution Pulse Width Modulation (eHRPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Enhanced HRPWM time resolution
  • 8x Enhanced Capture (ECAP) modules
  • 2x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x Sigma-Delta Filter Modules (SDFM)

Data Storage

  • 1 × 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
  • Targeted for ISO 21434 compliance
  • Secure boot support
    • Device Take Over Protection
    • Hardware enforced root-of-trust
    • Authenticated boot
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after proper authentication
    • Ability to disable device debug functionality
  • Device ID and Key Management
    • Support for OTP Memory (FUSEROM)
      • Store root keys and other security fields
    • Separate EFUSE controllers and FUSE ROMs
    • Unique Device Public Identifiers
  • Memory Protection Units (MPU)
    • Dedicated Arm MPU per Cortex-R5F core
    • System MPU - present at various interfaces in the SoC (MPU or Firewall)
    • 8 to 16 Programmable Regions
      • Enable/Privilege ID
      • Start/End Address
      • Read/Write/Cachable
      • Secure/Non-Secure
  • Cryptographic acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • DRBG with pseudo and true random number generator

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM)
    • ECC or parity on calculation critical memories
    • Built-In Self-Test (BIST) on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3
    • Hardware integrity up to SIL-3
    • Safety-related certification
      • IEC 61508 certified
  • Functional Safety-Compliant [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Safety-related certification
      • ISO 26262 certified

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • ZCZ Package
    • 324-pin NFBGAs
    • 15.00mm × 15.00mm
    • 0.8mm pitch
  • ZFG Package
    • 304-pin NFBGA
    • 13.25mm × 13.25mm
    • 0.65mm pitch
  • ZEJ Package
    • 256-pin NFBGA
    • 13.00mm × 13.00mm
    • 0.8mm pitch
  • ZNC Package
    • 293-pin NFBGA
    • 10.00mm × 10.00mm
    • 0.5mm pitch

Processor Cores:

  • Single and Dual Arm Cortex R5F CPU with each core running up to 500MHz
    • 16KB I-Cache with 64-bit ECC per CPU core
    • 16KB D-cache with 32-bit ECC per CPU core
    • 256KB Tightly Coupled Memory (TCM) with 32-bit ECC per core
    • Lockstep or Dual-core operation supported
  • Trigonometric Math Unit (TMU) for accelerating trigonometric functions
    • Up to 2x, one per R5F MCU core

Memory:

  • 1.5MB of On-Chip Shared RAM (OCSRAM):
    • 3 banks × 512KB
    • ECC error protection for full 1.5MB OCSRAM

    • Remote L2 Cache (RL2) for external memory, software programmable up to 256KB per CPU core

  • 2x Octal Serial Peripheral Interface (OSPI) up to 133MHz SDR and DDR
    • 1x with eXecute In Place (XIP) support

    • RAM expansion/Flash over the Air (FOTA)

  • General-Purpose Memory Controller (GPMC)
    • 16-bit parallel data bus with 22-bit address bus and 4 chip selects
    • Up to 4MB addressable memory space
    • Integrated Error Location Module (ELM) support for error checking

System on Chip (SoC) Services and Architecture:

  • 1x EDMA to support data movement functions
  • Device Boot supported from the following interfaces:
    • UART (Primary/Backup)

    • OSPI NOR and NAND Flash (50MHz SDR and 25MHz DDR) (Primary)

    • USB Peripheral boot
  • Interprocessor communication modules
    • SPINLOCK module for synchronizing processes running on multiple cores
    • MAILBOX functionality implemented through CTRLMMR registers
  • Central Platform Time Sync (CPTS) support with time-sync and compare-event interrupt routers
  • Timer Modules:
    • 2x Windowed Watchdog Timer (WWDT)
    • 4x Real Time Interrupt (RTI) timer

USB 2.0

  • Port configurable as USB host, USB device, or USB Dual-Role device
  • USB 2.0 Host mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)
    • Low-Speed (LS, 1.5Mbps)
  • USB 2.0 Device mode
    • High-Speed (HS, 480Mbps)
    • Full-Speed (FS, 12Mbps)

Industrial Connectivity:

  • 2x Programmable Real-time Unit – Industrial Communication Subsystem (PRU-ICSS)
    • Dual core Programmable Realtime Unit Subsystem (PRU0 / PRU1) per PRU-ICSS for 4 cores total
      • Deterministic hardware
      • Dynamic firmware
    • 20-channel enhanced input (eGPI) per PRU
    • 20-channel enhanced output (eGPO) per PRU
    • Embedded Peripherals and Memory
      • 1x UART, 1x ECAP, 1x MDIO, 1x IEP
      • 1x 32KB Shared General Purpose RAM
      • 2x 8KB Shared Data RAM
      • 1x 12KB IRAM per PRU
      • ScratchPad (SPAD), MAC/CRC
    • Digital encoder and sigma-delta control loops
    • The PRU-ICSS enables advanced industrial protocols including:
      • EtherCAT, Ethernet/IP™
      • PROFINET, IO-Link
    • Dedicated Interrupt Controller (INTC)
    • Dynamic CONTROLSS XBAR Integration

High Speed Interfaces

  • Integrated 3-port Gigabit Ethernet Switch (CPSW) supporting up to two external ports
    • Selectable MII (10/100), RMII (10/100), or RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • 512x ALE engine based packet classifiers
    • Priority flow control with up to 2KB packet size
    • Four CPU hardware interrupt pacing
    • IP/ UDP/ TCP checksum offload in hardware
    • Time Sensitive Network (TSN) Support
    • Cut-thru switching and Interexpress Traffic (IET) support

General Connectivity:

  • 6x Universal Asynchronous RX-TX (UART)
  • 4x Serial Peripheral Interface (SPI) controllers
  • 3x Local Interconnect Network (LIN) ports
  • 3x Inter-Integrated Circuit (I2C) ports
  • 2x Modular Controller Area Network (MCAN) modules with CAN-FD support
  • 1x Fast Serial Interface Transmitter (FSITX)
  • 1x Fast Serial Interface Receiver (FSIRX)
  • Up to 141x General Purpose I/O (GPIO) pins

Sensing and Actuation:

  • Real-time Control Subsystem (CONTROLSS)
  • Flexible Input/Output Crossbars (XBAR)
  • 3x 12-bit Analog to Digital Converters (ADC) with 3 MSPS maximum sampling rate
    • Each ADC module with
      • 7x Single ended channels OR
      • 3x Differential channels
    • Highly configurable ADC digital logic
      • With selectable internal or external reference
      • 4x Post-Processing blocks for each ADC module
  • 9x Analog Comparators with internal 12-bit DAC reference (CMPSSA)
  • 1x 12 bit Digital to Analog Converter (DAC)
  • 10x Enhanced High Resolution Pulse Width Modulation (eHRPWM) modules
    • Single or Dual PWM channels
    • Advanced PWM Configurations
    • Enhanced HRPWM time resolution
  • 8x Enhanced Capture (ECAP) modules
  • 2x Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2x Sigma-Delta Filter Modules (SDFM)

Data Storage

  • 1 × 4-bit Multi-Media Card/Secure Digital (MMC/SD) interface

Security:

  • Hardware Security Module (HSM) with support for Auto SHE 1.1/EVITA
  • Targeted for ISO 21434 compliance
  • Secure boot support
    • Device Take Over Protection
    • Hardware enforced root-of-trust
    • Authenticated boot
    • SW Anti-rollback protection
  • Debug security
    • Secure device debug only after proper authentication
    • Ability to disable device debug functionality
  • Device ID and Key Management
    • Support for OTP Memory (FUSEROM)
      • Store root keys and other security fields
    • Separate EFUSE controllers and FUSE ROMs
    • Unique Device Public Identifiers
  • Memory Protection Units (MPU)
    • Dedicated Arm MPU per Cortex-R5F core
    • System MPU - present at various interfaces in the SoC (MPU or Firewall)
    • 8 to 16 Programmable Regions
      • Enable/Privilege ID
      • Start/End Address
      • Read/Write/Cachable
      • Secure/Non-Secure
  • Cryptographic acceleration
    • Cryptographic cores with DMA Support
    • AES - 128/192/256-bit key sizes
    • SHA2 - 256/384/512-bit support
    • DRBG with pseudo and true random number generator

Functional Safety:

  • Enables design of systems with functional safety requirements
    • Error Signaling Module (ESM)
    • ECC or parity on calculation critical memories
    • Built-In Self-Test (BIST) on-chip RAM
    • Runtime internal diagnostic modules including voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engines for memory integrity checks
  • Functional Safety-Compliant [Industrial]
    • Developed for functional safety applications
    • Documentation to be made available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL-3
    • Hardware integrity up to SIL-3
    • Safety-related certification
      • IEC 61508 certified
  • Functional Safety-Compliant [Automotive]
    • Developed for functional safety applications
    • Documentation to be made available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Safety-related certification
      • ISO 26262 certified

Technology / Package:

  • AEC-Q100 qualified for automotive applications
  • ZCZ Package
    • 324-pin NFBGAs
    • 15.00mm × 15.00mm
    • 0.8mm pitch
  • ZFG Package
    • 304-pin NFBGA
    • 13.25mm × 13.25mm
    • 0.65mm pitch
  • ZEJ Package
    • 256-pin NFBGA
    • 13.00mm × 13.00mm
    • 0.8mm pitch
  • ZNC Package
    • 293-pin NFBGA
    • 10.00mm × 10.00mm
    • 0.5mm pitch

The AM261x Sitara Arm Microcontrollers are part of Sitara AM26x real-time MCU families designed to meet the complex real-time processing needs of next generation industrial and automotive embedded products. With scalable Arm Cortex R5F performance and an extensive set of peripherals, AM261x device is designed for a broad range of applications while offering safety features and optimized peripherals for real time control.

Key features and benefits:

  • Peripherals supporting system level connectivity such as Gigabit Ethernet, USB, OSPI/QSPI, CAN, UARTs, SPI and GPIOs.
  • Granular firewalls managed by Hardware Security Manager (HSM) enable developers to implement stringent security minded system design requirements.
  • Up to two R5F cores in cluster with 256KB of shared Tightly Coupled Memory (TCM) per core along with 1.5MB of shared SRAM, greatly reducing the need for external memory.

The AM261x Sitara Arm Microcontrollers are part of Sitara AM26x real-time MCU families designed to meet the complex real-time processing needs of next generation industrial and automotive embedded products. With scalable Arm Cortex R5F performance and an extensive set of peripherals, AM261x device is designed for a broad range of applications while offering safety features and optimized peripherals for real time control.

Key features and benefits:

  • Peripherals supporting system level connectivity such as Gigabit Ethernet, USB, OSPI/QSPI, CAN, UARTs, SPI and GPIOs.
  • Granular firewalls managed by Hardware Security Manager (HSM) enable developers to implement stringent security minded system design requirements.
  • Up to two R5F cores in cluster with 256KB of shared Tightly Coupled Memory (TCM) per core along with 1.5MB of shared SRAM, greatly reducing the need for external memory.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 AM261x Sitara™ Microcontrollers datasheet (Rev. C) PDF | HTML 2025/7/9
應用說明 Designing a Deterministic scalable Ethernet backbone for Robotics PDF | HTML 2026/6/15
功能安全資訊 AM261x, AM263x, and AM263Px Software Diagnostics Library TUV SUD Functional Safety Certificate (Rev. B) 2026/4/1
應用說明 AM26 Ethercat SubDevice with TwinCat PDF | HTML 2025/12/10
白皮書 Integrating EVCC, DCDC, and Host Architecture: TI Automotive MCUs for Next-Generation EV Charging (Rev. A) PDF | HTML 2025/11/13
應用說明 Implementing USB True Host Detection on AM261x PDF | HTML 2025/9/30
應用說明 AM261x Power Estimation Tool PDF | HTML 2025/7/11
功能安全資訊 AM261 TÜV SÜD Functional Safety Certificate 2025/7/10
功能安全資訊 AM261 TÜV SÜD Functional Safety Certificate Report PDF | HTML 2025/7/10
Product overview AM26xx Family TIFS-SDK Product Brief PDF | HTML 2025/5/29
白皮書 AM261x 和 AM263Px 使用的工业通信协议 PDF | HTML 2025/5/12
應用說明 How to Synchronize the Timing Between Chips With Programmable Real-Time Unit PDF | HTML 2025/3/10
Application brief Achieving Faster Secure Boot Time on AM26x Devices PDF | HTML 2024/11/13

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AM261-SOM-EVM — AM261x 控制系統模組 (SOM) 評估模組

AM261-SOM-EVM 是德州儀器 Sitara™ AM261x 系列微控制器 (MCU) 的評估與開發電路板。該系統模組設計採用三個 120 針腳高速高密度連接器，非常適合初期評估與快速原型開發。使用 AM261-SOM-EVM 進行評估時，需搭配 XDS110ISOEVM（需另行購買或與 AM261-SOM-EVM 成套購買）。
使用指南: PDF | HTML
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偵錯探測器

LB-3P-TRACE32-ARM — 適用於 Arm® 架構微控制器和處理器的 Lauterbach TRACE32® 偵錯和追蹤系統

Lauterbach 的 TRACE32® 工具是一套先進的軟硬體元件，可讓開發人員分析、最佳化及認證各種 Arm® 架構微控制器和處理器。全球知名的嵌入式系統和 SoC 偵錯和追蹤解決方案是完美的解決方案，適用於從早期的矽前 (pre-silicon) 開發，到產品認證和現場故障排除等所有開發階段。Lauterbach 工具的直覺模組化設計為工程師提供現今最高的可用性能，以及可隨需求變化而調整和成長的系統。藉由 TRACE32® 偵錯器，開發人員也可透過單一偵錯介面，同時偵錯和控制 SoC 中的任何 C28x/C29x/C6x/C7x DSP 核心及所有其他 Arm (...)

從：Lauterbach GmbH
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軟體開發套件 (SDK)

AM261X-MCAL-SDK — Microcontroller Abstraction Layer (MCAL) and Complex Device Drivers (CDD) for AM261X

AM261x 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 包含 R5F 及 M4 核心、範例、驅動程式與開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 TI 的 Code Composer Studio 整合式開發環境共同運作。

 

軟體支援：

  • (...)
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軟體開發套件 (SDK)

AM261X-TIFS-SDK — AM261x foundational security software

AM261x 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 包含 R5F 及 M4 核心、範例、驅動程式與開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 TI 的 Code Composer Studio 整合式開發環境共同運作。

 

軟體支援：

  • (...)
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軟體開發套件 (SDK)

IND-COMMS-SDK — 工業即時通訊軟體開發套件

這款軟體開發套件 (SDK) 包含 TI 處理器上的即時工業通訊協定 (EtherCAT、EtherNet/IP、PROFINET、IO-Link 等)。此外也具備 PRU-ICSS 韌體、驅動程式、通訊堆疊函式庫和應用範例，以及相關文件。

新功能：

  • 透過 EtherCAT EoE 的乙太網路
  • 透過 EtherCAT FoE 存取檔案
  • 整合 NVM 資料庫以持續儲存資料 — EtherCAT 範例現在使用 EEPROM 來儲存 EtherCAT EEPROM 資料，而非使用快閃記憶體
  • Ethernet/IP — 物件字典大小應可在無需重新建立堆疊的情況下進行變更
  • IOLINK 控制器 — (...)
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軟體開發套件 (SDK)

MCU-PLUS-SDK-AM261X — MCU+ SDK for AM261x - RTOS, No-RTOS

AM261x 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 包含 R5F 及 M4 核心、範例、驅動程式與開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 TI 的 Code Composer Studio 整合式開發環境共同運作。

 

軟體支援：

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支援產品和硬體
軟體開發套件 (SDK)

MOTOR-CONTROL-SDK-AM261X — Motor Control SDK for AM261x

AM261x 微控制器 (MCU) 外加軟體開發套件 (SDK) 是一套專為嵌入式處理器所設計的統合軟體平台，設定簡單且可立即存取範例、基準測試與示範。此軟體不必從頭開始建立基本系統軟體功能，所以能加速應用程式開發時程。

 

SDK 包含 R5F 及 M4 核心、範例、驅動程式與開機載入程式的支援。SDK 的確切內容視裝置的功能而定，但所有裝置都共享通用應用程式介面 (API)，並建置在現有經實證的軟體元件上，以確保可靠性和品質。軟體元件經過完整測試，確保其可搭配 TI 的 Code Composer Studio 整合式開發環境共同運作。

 

軟體支援：

  • (...)
支援產品和硬體
IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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IDE、配置、編譯器或偵錯程式

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

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線上培訓

AM26X-ACADEMY — AM26x academy

AM26x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
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模擬型號

AM2611 and AM2612 BSDL Model (Rev. B)

SPRM875B.ZIP (22 KB) - BSDL 模型
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計算工具

AM261X-PET-CALC — AM261x Power Estimation Tool

Power Estimation Tool for AM261x Family of Devices. This tool can be used to provide a general estimate of the expected device power consumption for common applications.
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
NFBGA (ZEJ) 256 Ultra Librarian
NFBGA (ZNC) 293 Ultra Librarian
NFBGA (ZCZ) 324 Ultra Librarian
NFBGA (ZFG) 304 Ultra Librarian
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