产品详情

Number of channels 2 Vrwm (V) 13 Bi-/uni-directional Bi-directional Package name LGA (PicoStar), SC70-3 Peak pulse power (8/20 μs) (max) (W) 0.27 IO capacitance (typ) (pF) 10 IEC 61000-4-2 contact (±V) 8000 IEC 61000-4-5 (A) 4.5 Clamping voltage (V) 20 Dynamic resistance (typ) 3.5 Interface type Audio Breakdown voltage (min) (V) 14 IO leakage current (max) (nA) 50 Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 2 Vrwm (V) 13 Bi-/uni-directional Bi-directional Package name LGA (PicoStar), SC70-3 Peak pulse power (8/20 μs) (max) (W) 0.27 IO capacitance (typ) (pF) 10 IEC 61000-4-2 contact (±V) 8000 IEC 61000-4-5 (A) 4.5 Clamping voltage (V) 20 Dynamic resistance (typ) 3.5 Interface type Audio Breakdown voltage (min) (V) 14 IO leakage current (max) (nA) 50 Rating Catalog Operating temperature range (°C) -40 to 85
PICOSTAR (YFM) 4 0.5929 mm² (— mm × — mm) SOT-SC70 (DCK) 3 4.2 mm² (2 mm × 2.1 mm)
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±8-kV IEC 61000-4-2 Contact Discharge
    • ±15-kV IEC 61000-4-2 Air-Gap Discharge
  • IEC 61000-4-5 Surge Protection
    • 4.5-A Peak Pulse Current (8/20-µs Pulse)
  • IO Capacitance 15 pF (Max)
  • Low 50-nA Leakage Current
  • Space-Saving PicoStar™ and SOT Package
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±8-kV IEC 61000-4-2 Contact Discharge
    • ±15-kV IEC 61000-4-2 Air-Gap Discharge
  • IEC 61000-4-5 Surge Protection
    • 4.5-A Peak Pulse Current (8/20-µs Pulse)
  • IO Capacitance 15 pF (Max)
  • Low 50-nA Leakage Current
  • Space-Saving PicoStar™ and SOT Package

This device is a transient voltage suppressor (TVS) based electrostatic discharge (ESD) protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, and so forth) without compromising signal integrity. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector.

The TPD2E007 is offered in a 4-bump PicoStar and 3-pin SOT (DGK) packages. The PicoStar package (YFM), with only 0.15 mm (Max) package height, is recommended for ultra space saving application where the package height is a key concern. The PicoStar package can be used in either embedded PCB board applications or in surface mount applications. The industry standard SOT package offers straightforward board layout option in legacy designs.

This device is a transient voltage suppressor (TVS) based electrostatic discharge (ESD) protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, and so forth) without compromising signal integrity. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector.

The TPD2E007 is offered in a 4-bump PicoStar and 3-pin SOT (DGK) packages. The PicoStar package (YFM), with only 0.15 mm (Max) package height, is recommended for ultra space saving application where the package height is a key concern. The PicoStar package can be used in either embedded PCB board applications or in surface mount applications. The industry standard SOT package offers straightforward board layout option in legacy designs.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 TPD2E007 2-Channel ESD Protection Array for AC-Coupled/Negative-Rail Data Interfaces 数据表 (Rev. I) PDF | HTML 2016-3-22
选择指南 System-Level ESD Protection Guide (Rev. E) PDF | HTML 2025-8-5
应用手册 ESD 包装和布局指南 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2022-9-14
白皮书 Designing USB for short-to-battery tolerance in automotive environments 2016-2-10
模拟设计期刊 系统级 ESD 电路保护的设计注意事项 英语版 2012-12-6

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评估板

ESDEVM — 适用于 ESD 二极管封装(包括 0402、0201 等)的通用评估模块

静电敏感器件 (ESD) 评估模块 (EVM) 是用于 TI 大部分 ESD 产品系列的开发平台。为了测试任何型号的器件,该电路板支持所有传统的 ESD 封装结构。器件可以焊接到相应封装结构,然后进行测试。如果是典型的高速 ESD 二极管,则应采用阻抗受控布局来获取 S 参数并剥离电路板引线。如果是非高速 ESD 二极管,则应采用有布线连接到测试点的封装结构,以便轻松运行直流测试,例如击穿电压、保持电压、漏电流等。该电路板布局布线还可以通过将信号引脚短接至信号所在的位置,轻松地将任何器件引脚连接到电源 (VCC) 或地。
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封装 引脚 CAD 符号、封装和 3D 模型
PICOSTAR (YFM) 4 Ultra Librarian
SOT-SC70 (DCK) 3 Ultra Librarian

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