TPA5050
- Digital Audio Formats: 16-24-bit I2S, Right-Justified, Left-Justified
- I2C Bus Controlled
- Single Serial Input Port
- Delay Time: 170 ms/ch at fs = 48 kHz
- Delay Resolution: One Sample
- Delay Memory Cleared on Power-Up or After Delay Changes
- Eliminates Erroneous Data From Being Output
- 3.3 V Operation With 5 V Tolerant I/O and I2C Control
- Supports Audio Bit Clock Rates of 32 to 64 fs with fs = 32 kHz-192 kHz
- No external crystal or oscillator required
- All Internal Clocks Generated From the Audio Clock
- Surface Mount 4mm × 4mm, 16-pin QFN Package
- APPLICATIONS
- High Definition TV Lip-Sync Delay
- Flat Panel TV Lip-Sync Delay
- Home Theater Rear-Channel Effects
- Wireless Speaker Front-Channel Synchronization
The TPA5050 accepts a single serial audio input, buffers the data for a selectable period of time, and outputs the delayed audio data on a single serial output. One device allows delay of up to 170 ms/ch (fs = 48 kHz) to synchronize the audio stream to the video stream in systems with complex video processing algorithms. If more delay is needed, the devices can be connected in series.
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| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | Stereo Digital Audio Lip-Sync Delay With I2C Control 数据表 (Rev. B) | 2007-5-21 |
设计与开发
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评估板
TPA5051EVM — TPA5051 Evaluation Module
The TPA5051 evaluation module (EVM) consists of a single TPA5051 audio delay device, along with other external components mounted on a printed-circuit board (PCB) that can be used to independently delay two digital audio streams. Each digital audio stream consists of a left and right channel, both (...)
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| VQFN (RSA) | 16 | Ultra Librarian |