TLV5604
- Four 10-Bit D/A Converters
- Programmable Settling Time of 3 us or 9 us Typ
- TMS320, (Q)SPI™, and Microwire™ Compatible Serial Interface
- Internal Power-On Reset
- Low Power Consumption:
5.5 mW, Slow Mode – 5-V Supply
3.3 mW, Slow Mode – 3-V Supply - Reference Input Buffers
- Voltage Output Range ...2× the Reference Input Voltage
- Monotonic Over Temperature
- Dual 2.7-V to 5.5-V Supply (Separate Digital and Analog Supplies)
- Hardware Power Down (10 nA)
- Software Power Down (10 nA)
- Simultaneous Update
- applications
- Battery Powered Test Instruments
- Digital Offset and Gain Adjustment
- Industrial Process Controls
- Machine and Motion Control Devices
- Communications
- Arbitrary Waveform Generation
SPI and QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corporation.
The TLV5604 is a quadruple 10-bit voltage output digital-to-analog converter (DAC) with a flexible 4-wire serial interface. The 4-wire serial interface allows glueless interface to TMS320, SPI, QSPI, and Microwire serial ports. The TLV5604 is programmed with a 16-bit serial word comprised of a DAC address, individual DAC control bits, and a 10-bit DAC value.
The device has provision for two supplies: one digital supply for the serial interface (via pins DVDD and DGND), and one for the DACs, reference buffers and output buffers (via pins AVDD and AGND). Each supply is independent of the other, and can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical application where the DAC will be controlled via a microprocessor operating on a 3-V supply (also used on pins DVDD and DGND), with the DACs operating on a 5-V supply. Of course, the digital and analog supplies can be tied together.
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode makes it ideal for single voltage, battery based applications. The settling time of the DAC is programmable to allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits within the 16-bit serial input string. A high-impedance buffer is integrated on the REFINAB and REFINCD terminals to reduce the need for a low source impedance drive to the terminal. REFINAB and REFINCD allow DACs A and B to have a different reference voltage then DACs C and D.
The device, implemented with a CMOS process, is available in 16-terminal SOIC and TSSOP packages. The TLV5604C is characterized for operation from 0°C to 70°C. The TLV5604I is characterized for operation from –40°C to 85°C.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | 2.7-V to 5.5-V 10-Bit 3-uS Quadruple Digital-to-Analog Converters w/Power Down 数据表 (Rev. B) | 2002-7-9 |