TLV1548-EP
- Controlled Baseline
- One Assembly Site, One Test Site, One Fabrication Site
- Extended Temperature Performance of –40°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- Conversion Time ≤ 10 µs
- 10-Bit-Resolution ADC
- Programmable Power-Down Mode . . . 1 µA
- Wide Range Single-Supply Operation of 2.7 V dc to 5.5 V dc
- Analog Input Range of 0 V to VCC
- Built-in Analog Multiplexer with 8 Analog Input Channels
- TMS320 DSP and Microprocessor SPI and QSPI Compatible Serial Interfaces
- End-of-Conversion (EOC) Flag
- Inherent Sample-and-Hold Function
- Built-In Self-Test Modes
- Programmable Power and Conversion Rate
- Asynchronous Start of Conversion for Extended Sampling
- Hardware I/O Clock Phase Adjust Input
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
SPI and QSPI are registered trademarks of Motorola, Inc.
The TLV1548 is a CMOS 10-bit switched-capacitor successive-approximation (SAR) analog-to-digital (A/D) converter. The device has a chip select (CS)\, input-output clock (I/O CLK), data input (DATA IN) and serial data output (DATA OUT) that provides a direct 4-wire synchronous serial peripheral interface (SPI™, QSPI™) port of a host microprocessor. When interfacing with a TMS320 DSP, an additional frame sync signal (FS) indicates the start of a serial data frame. The device allows high-speed data transfers from the host. The INV CLK\ input provides further timing flexibility for the serial interface.
In addition to a high-speed converter and versatile control capability, the device has an on-chip 11-channel multiplexer that can select any one of eight analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic except for the extended sampling cycle, where the sampling cycle is started by the falling edge of asynchronous CSTART\. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that the conversion is complete. The TLV1548 is designed to operate with a wide range of supply voltages with very low power consumption. The power saving feature is further enhanced with a software-programmed power-down mode and conversion rate. The converter incorporated in the device features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range.
The TLV1548 has eight analog input channels. The TLV1548Q is characterized for operation from –40°C to 125°C.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input 数据表 (Rev. A) | 2003-12-5 | |||
| * | VID | TLV1548-EP VID V6204618 | 2016-6-21 | |||
| 电子书 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015-5-21 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011-3-17 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010-11-10 |
设计与开发
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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SSOP (DB) | 20 | Ultra Librarian |