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Resolution (Bits) 10 Sample rate (max) (ksps) 38 Number of input channels 11 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating HiRel Enhanced Product Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 4 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
Resolution (Bits) 10 Sample rate (max) (ksps) 38 Number of input channels 11 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating HiRel Enhanced Product Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 4 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm)
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 10-Bit Resolution A/D Converter
  • 11 Analog Input Channels
  • Three Built-In Self-Test Modes
  • Inherent Sample-and-Hold Function
  • Total Unadjusted Error . . . ±1 LSB Max
  • On-Chip System Clock
  • End-of-Conversion (EOC) Output
  • Terminal Compatible With TLC542
  • CMOS Technology

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 10-Bit Resolution A/D Converter
  • 11 Analog Input Channels
  • Three Built-In Self-Test Modes
  • Inherent Sample-and-Hold Function
  • Total Unadjusted Error . . . ±1 LSB Max
  • On-Chip System Clock
  • End-of-Conversion (EOC) Output
  • Terminal Compatible With TLC542
  • CMOS Technology

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The TLC1542-EP and TLC1543-EP are CMOS 10-bit switched-capacitor successive-approximation analog-to-digital converters. These devices have three inputs, a 3-state output chip select (CS)\, input/output clock (I/O CLOCK), address input (ADDRESS), and data output (DATA OUT)] that provide a direct 4-wire interface to the serial port of a host processor. The TLC1542-EP and TLC1543-EP allow high-speed data transfers from the host.

In addition to a high-speed A/D converter and versatile control capability, the TLC1542-EP and TLC1543-EP have an on-chip 14-channel multiplexer that can select any one of 11 analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that conversion is complete. The converter incorporated in the TLC1542-EP and TLC1543-EP feature differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating free-air temperature range.

The TLC1542-EP and TLC1543-EP are CMOS 10-bit switched-capacitor successive-approximation analog-to-digital converters. These devices have three inputs, a 3-state output chip select (CS)\, input/output clock (I/O CLOCK), address input (ADDRESS), and data output (DATA OUT)] that provide a direct 4-wire interface to the serial port of a host processor. The TLC1542-EP and TLC1543-EP allow high-speed data transfers from the host.

In addition to a high-speed A/D converter and versatile control capability, the TLC1542-EP and TLC1543-EP have an on-chip 14-channel multiplexer that can select any one of 11 analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that conversion is complete. The converter incorporated in the TLC1542-EP and TLC1543-EP feature differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating free-air temperature range.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 10-Bit Analog-to-Digital Converters w/Serial Control & 11 Analog Inputs 数据表 (Rev. A) 2006-2-21
* VID TLC1543-EP VID V6204647 2016-6-21
电子书 Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015-5-21
应用手册 Determining Minimum Acquisition Times for SAR ADCs, part 2 2011-3-17

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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