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SN74LVC2T45-EP

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具有可配置电压转换和三态输出的双位双电源收发器（增强型产品）

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SN74LVC2T45-EP

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Bits (#) 2 Data rate (max) (Mbps) 420 Topology Push-Pull Vin (min) (V) 1.65 Vin (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Applications GPIO, I2S Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) Prop delay (ns) 7.9 Technology family LVC Supply current (max) (mA) 0.004 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Bits (#) 2 Data rate (max) (Mbps) 420 Topology Push-Pull Vin (min) (V) 1.65 Vin (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Applications GPIO, I2S Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) Prop delay (ns) 7.9 Technology family LVC Supply current (max) (mA) 0.004 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SSOP (DCT) 8 11.8 mm² (2.95 mm × 4 mm)
  • Available in the Texas Instruments NanoFree™ Package
  • Fully Configurable Dual-Rail Design Allows Each Port to
    Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
  • VCC Isolation Feature – If Either VCC Input Is at GND,
    Both Ports Are in the High-Impedance State
  • DIR Input Circuit Referenced to VCCA
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Max Data Rates
    • 420 Mbps (3.3-V to 5-V Translation)
    • 210 Mbps (Translate to 3.3 V)
    • 140 Mbps (Translate to 2.5 V)
    • 75 Mbps (Translate to 1.8 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available Temperature Ranges:
      • –55°C to 125°C
      • –55°C to 150°C
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

NanoFree Is a trademark of Texas Instruments
  • Available in the Texas Instruments NanoFree™ Package
  • Fully Configurable Dual-Rail Design Allows Each Port to
    Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
  • VCC Isolation Feature – If Either VCC Input Is at GND,
    Both Ports Are in the High-Impedance State
  • DIR Input Circuit Referenced to VCCA
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Max Data Rates
    • 420 Mbps (3.3-V to 5-V Translation)
    • 210 Mbps (Translate to 3.3 V)
    • 140 Mbps (Translate to 2.5 V)
    • 75 Mbps (Translate to 1.8 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available Temperature Ranges:
      • –55°C to 125°C
      • –55°C to 150°C
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

NanoFree Is a trademark of Texas Instruments

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

The SN74LVC2T45 is designed so that the DIR input circuit is supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

The SN74LVC2T45 is designed so that the DIR input circuit is supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 Dual-Bit Dual-Supply Bus Tranceiver With Configurable Voltage Translation 数据表 (Rev. C) 2010-7-22
* 辐射与可靠性报告 SN74LVC2T45MDCTTEP Reliability Report 2013-9-6
应用手册 原理图检查清单 - 使用自动双向转换器进行设计的指南 PDF | HTML 英语版 PDF | HTML 2024-12-3
应用手册 原理图检查清单 - 使用固定或方向控制转换器进行设计的指南 PDF | HTML 英语版 PDF | HTML 2024-10-3
应用手册 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024-7-3
应用简报 Voltage Translation for Rugged High Reliability Applications PDF | HTML 2021-7-20
选择指南 Voltage Translation Buying Guide (Rev. A) 2021-4-15

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