SN74LVC2GU04
- Available in the Texas Instruments NanoFree Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 3.7 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH
Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C - Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level
- Unbuffered Outputs
- Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II - ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
This dual inverter is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2GU04 device contains two inverters with unbuffered outputs and performs the Boolean function Y = A.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
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功能优于比较器件，可直接替换。
功能与比较器件相同且具有相同引脚。
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| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | Dual Inverter Gate--SN74LVC2GU04 数据表 (Rev. N) | 2013-12-12 | |||
| 应用简报 | Generate a Clock Signal from a Crystal Oscillator | PDF | HTML | 2020-10-8 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
评估板
5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑评估模块
灵活的 EVM 设计用于支持具有 5 至 8 引脚数且采用 DCK、DCT、DCU、DRL 或 DBV 封装的任何器件。
用户指南:
PDF
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| DSBGA (YZP) | 6 | Ultra Librarian |
| SOT-SC70 (DCK) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 6 | Ultra Librarian |