产品详情

Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 Input type Standard CMOS IOH (max) (mA) -32 Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 Input type Standard CMOS IOH (max) (mA) -32 Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) SOT-SC70 (DCK) 6 4.2 mm² (2 mm × 2.1 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) SOT-23 (DBV) 6 8.12 mm² (2.9 mm × 2.8 mm) DSBGA (YZP) 6 2.1875 mm² (— mm × — mm)
  • Available in the Texas Instruments
    NanoStar and NanoFree
    Packages
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • Available in the Texas Instruments
    NanoStar and NanoFree
    Packages
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

The SN74LVC1G386 device performs the Boolean function Y = A × B × C in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LVC1G386 device performs the Boolean function Y = A × B × C in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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* 数据表 SN74LVC1G386 数据表 (Rev. E) 2012-12-24

设计与开发

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5-8-LOGIC-EVM — 支持 5 至 8 引脚 DCK、DCT、DCU、DRL 和 DBV 封装的通用逻辑评估模块

灵活的 EVM 设计用于支持具有 5 至 8 引脚数且采用 DCK、DCT、DCU、DRL 或 DBV 封装的任何器件。
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评估板

5-8-NL-LOGIC-EVM — 支持 5 至 8 引脚 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封装的通用逻辑和转换 EVM

通用 EVM 旨在支持采用 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封装的任何逻辑或转换器件。电路板设计可实现灵活的评估。

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仿真模型

SN74LVC1G386 Behavioral SPICE Model

SCEM628.ZIP (8 KB) - PSpice 模型
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仿真模型

SN74LVC1G386 IBIS Model

SCEM345.ZIP (44 KB) - IBIS 模型
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封装 引脚 CAD 符号、封装和 3D 模型
USON (DRY) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
SOT-23 (DBV) 6 Ultra Librarian
DSBGA (YZP) 6 Ultra Librarian

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