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SN74HCS596-Q1

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汽车类 8 位串行输入/并行输出移位寄存器

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SN74HCS596-Q1

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Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type Open-drain Clock frequency (MHz) 75 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type Open-drain Clock frequency (MHz) 75 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V

The SN74HCS596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of the OE input.

The SN74HCS596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of the OE input.
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SN74AC596-Q1 正在供货 汽车级 1.5V 至 6.0V、8 位串行输入和并行输出移位寄存器 Voltage range 2V to 6V, average propagation delay 7ns, average drive strength 24mA

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* 数据表 SN74HCS596-Q1 Automotive 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-drain Output Registers 数据表 PDF | HTML 2020-6-10

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SN74HCS596 IBIS Model

SCEM770.ZIP (51 KB) - IBIS 模型
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SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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