SN74FB1650
- Compatible With IEEE Std 1194.1-1991 (BTL)
- TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
- Open-Collector B\-Port Outputs Sink 100 mA
- BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
- High-Impedance State During Power Up and Power Down
- B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
- TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination
The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
BG VCC and BG GND are the supply inputs for the bias generator.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | SN74FB1650 数据表 (Rev. O) | 2004-3-10 | |||
| 应用手册 | 原理图检查清单 - 使用自动双向转换器进行设计的指南 | PDF | HTML | 英语版 | PDF | HTML | 2024-12-3 | |
| 应用手册 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024-7-3 | |||
| 选择指南 | Voltage Translation Buying Guide (Rev. A) | 2021-4-15 | ||||
| 应用手册 | Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C) | 1997-3-1 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| HLQFP (PCA) | 100 | Ultra Librarian |