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D 型触发器

SN74F174A

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具有清零端的六路 D 型触发器

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SN74F174A

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数据表 立即订购

产品详情

Number of channels 6 Technology family F Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 80 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (µA) 55000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 6 Technology family F Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 80 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (µA) 55000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm)
  • Contains Six Flip-Flops With Single-Rail Outputs
  • Buffered Clock and Direct Clear Inputs
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators
  • Fully Buffered Outputs for Maximum Isolation From External Disturbances
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
  • Contains Six Flip-Flops With Single-Rail Outputs
  • Buffered Clock and Direct Clear Inputs
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators
  • Fully Buffered Outputs for Maximum Isolation From External Disturbances
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

The SN74F174A is characterized for operation from 0°C to 70°C.

 

 

This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear () input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

The SN74F174A is characterized for operation from 0°C to 70°C.

 

 
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* 数据表 Hex D-Type Flip-Flop With Clear 数据表 (Rev. B) 1993-10-1

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