产品详情

Technology family ALVC Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 40 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVC Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 40 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 3 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 3 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

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SN74AVC16244 正在供货 具有三态输出的 16 通道、1.4V 至 3.6V 缓冲器 Voltage range 0.9V to 3.6V, average propagation delay 2ns, average drive strength 12mA
SN74ABTH16244 正在供货 具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 16 通道、4.5V 至 5.5V 缓冲器 Voltage range 4.5V to 5.5V, average propagation delay 4.6ns, average drive strength 64mA

技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74ALVCH16244 数据表 (Rev. K) 2005-8-26
应用手册 An Overview of Bus-Hold Circuit and the Applications (Rev. B) 2018-9-17
应用手册 Timing Differences of 10-pF Versus 50pF Loading 1996-11-1

设计与开发

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仿真模型

SN74ALVCH16244 Behavioral SPICE Model

SCEM757.ZIP (7 KB) - PSpice 模型
支持的产品和硬件
仿真模型

SN74ALVCH16244 IBIS Model (Rev. B)

SCEM001A (8 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TVSOP (DGV) 48 Ultra Librarian
SSOP (DL) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian

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