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SN74ALVCH162344

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具有总线保持和三态输出的 8 通道、1.65V 至 3.6V 缓冲器

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SN74ALVCH162344

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产品详情

Technology family ALVC Number of channels 8 IOL (max) (mA) 12 Supply current (max) (µA) 40 IOH (max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Damping resistors, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVC Number of channels 8 IOL (max) (mA) 12 Supply current (max) (µA) 40 IOH (max) (mA) -12 Input type Standard CMOS Output type 3-State Features Balanced outputs, Bus-hold, Damping resistors, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 56 190.647 mm² (18.42 mm × 10.35 mm) TSSOP (DGG) 56 113.4 mm² (14 mm × 8.1 mm)
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65-V to 3.6-V
  • Max tpd of 4.4 ns at 3.3-V
  • ±12-mA Output Drive at 3.3-V
  • Output Ports Have Equivalent 26- Resistors, So No External Resistors Are Required
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65-V to 3.6-V
  • Max tpd of 4.4 ns at 3.3-V
  • ±12-mA Output Drive at 3.3-V
  • Output Ports Have Equivalent 26- Resistors, So No External Resistors Are Required
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

Widebus is a trademark of Texas Instruments.

This 1-bit to 4-bit address driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162344 is used in applications in which four separate memory locations must be addressed by a single address.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ inputs should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This 1-bit to 4-bit address driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162344 is used in applications in which four separate memory locations must be addressed by a single address.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ inputs should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74ALVCH162344 数据表 (Rev. I) 2004-9-2
应用手册 An Overview of Bus-Hold Circuit and the Applications (Rev. B) 2018-9-17

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仿真模型

SN74ALVCH162344 Behavioral SPICE Model

SCEM759.ZIP (7 KB) - PSpice 模型
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仿真模型

SN74ALVCH162344 IBIS Model

SCEM193.ZIP (60 KB) - IBIS 模型
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封装 引脚 CAD 符号、封装和 3D 模型
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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