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SN74AC245-EP

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具有三态输出的八通道总线收发器（增强型产品）

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SN74AC245-EP

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产品详情

Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family AC Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 85
Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family AC Rating HiRel Enhanced Product Operating temperature range (°C) -40 to 85
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm)
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 7 ns at 5 V

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Inputs Accept Voltages to 6 V
  • Max tpd of 7 ns at 5 V

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74AC245 octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

When the output-enable (OE)\ is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input. A high on OE\ disables the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74AC245 octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

When the output-enable (OE)\ is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input. A high on OE\ disables the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74AC245-EP 数据表 2004-9-28
* VID SN74AC245-EP VID V6204760 2016-6-21

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