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SN74ABTH162245

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具有三态输出的 16 位总线收发器

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SN74ABTH162245

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产品详情

Number of channels 16 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Bus-hold, Damping resistors, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family ABT Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 16 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Bus-hold, Damping resistors, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family ABT Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm) SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm)
  • Members of the Texas Instruments WidebusTM Family
  • A-Port Outputs Have Equivalent 25- Series Resistors, So No External Resistors Are Required
  • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV), and Shrink Small-Outline (DL) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.
  • Members of the Texas Instruments WidebusTM Family
  • A-Port Outputs Have Equivalent 25- Series Resistors, So No External Resistors Are Required
  • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV), and Shrink Small-Outline (DL) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.

The 'ABTH162245 devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so that the buses are effectively isolated.

The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABTH162245 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABTH162245 is characterized for operation from -40°C to 85°C.

The 'ABTH162245 devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so that the buses are effectively isolated.

The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABTH162245 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABTH162245 is characterized for operation from -40°C to 85°C.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 16-Bit Bus Transceivers With 3-State Outputs 数据表 (Rev. A) 1999-4-15
应用手册 An Overview of Bus-Hold Circuit and the Applications (Rev. B) 2018-9-17

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TSSOP (DGG) 48 Ultra Librarian
SSOP (DL) 48 Ultra Librarian
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