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SN74ABT640

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具有三态输出的八通道总线收发器

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数据表

SN74ABT640

正在供货
数据表 立即订购

产品详情

Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family ABT Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family ABT Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DB) 20 56.16 mm² (7.2 mm × 7.8 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm) TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) PDIP (N) 20 228.702 mm² (24.33 mm × 9.4 mm)
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs

 

EPIC-IIB is a trademark of Texas Instruments Incorporated.
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs

 

EPIC-IIB is a trademark of Texas Instruments Incorporated.

The 'ABT640 bus transceivers are designed for asynchronous communication between data buses. These devices transmit inverted data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT640 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT640 is characterized for operation from -40°C to 85°C.

 

 

The 'ABT640 bus transceivers are designed for asynchronous communication between data buses. These devices transmit inverted data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT640 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT640 is characterized for operation from -40°C to 85°C.

 

 
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* 数据表 Octal Bus Transceivers With 3-State Outputs 数据表 (Rev. C) 1997-1-1

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SSOP (DB) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
PDIP (N) 20 Ultra Librarian
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