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数模转换器 (DAC)
精密 DAC (≤10 MSPS)

DAC8812

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16 位、双串行输入乘法数模转换器

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数据表

DAC8812

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数据表 立即订购

产品详情

Resolution (Bits) 16 Number of DAC channels 2 Interface type SPI Output type Unbuffered Current INL (max) (±LSB) 1 Settling time (µs) 0.5 Reference type Ext Architecture Multiplying DAC Rating Catalog Features Reset to Mid-Scale Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.025 Operating temperature range (°C) -40 to 85
Resolution (Bits) 16 Number of DAC channels 2 Interface type SPI Output type Unbuffered Current INL (max) (±LSB) 1 Settling time (µs) 0.5 Reference type Ext Architecture Multiplying DAC Rating Catalog Features Reset to Mid-Scale Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.025 Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current ±20%,
    With VREF = ±10 V
  • 0.5-μs Settling Time
  • Midscale or Zero-Scale Reset
  • Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: –105-dB THD
  • SPI-Compatible 3-Wire Interface:
    50 MHz
  • Double Buffered Registers to Enable
    Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Industry-Standard Pin Configuration

All trademarks are the property of their respective owners. All trademarks are the property of their respective owners.

  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current ±20%,
    With VREF = ±10 V
  • 0.5-μs Settling Time
  • Midscale or Zero-Scale Reset
  • Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: –105-dB THD
  • SPI-Compatible 3-Wire Interface:
    50 MHz
  • Double Buffered Registers to Enable
    Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Industry-Standard Pin Configuration

All trademarks are the property of their respective owners. All trademarks are the property of their respective owners.

The DAC8812 is a dual, 16-bit, current-output digital-to-analog converter (DAC) designed to operate from a single 2.7-V to 5.5-V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A double-buffered, serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip-select (CS). A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turnon. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to midscale code when MSB = 1.

For all available packages, see the orderable addendum at the end of the data sheet.


The DAC8812 is a dual, 16-bit, current-output digital-to-analog converter (DAC) designed to operate from a single 2.7-V to 5.5-V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A double-buffered, serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip-select (CS). A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turnon. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to midscale code when MSB = 1.

For all available packages, see the orderable addendum at the end of the data sheet.


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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 DAC8812 Dual, Serial-Input 16-Bit Multiplying Digital-to-Analog Converter 数据表 (Rev. F) PDF | HTML 2016-7-11
应用手册 Time Gain Control (Compensation) in Ultrasound Applications 2016-12-2
模拟设计期刊 IBIS 模型：信号完整性分析的一种渠道，第 1 部分 英语版 2011-4-5
模拟设计期刊 4Q 2010 Issue Analog Applications Journal 2010-11-15

设计与开发

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仿真模型

DAC8812 IBIS Model

SBAM069.ZIP (15 KB) - IBIS 模型
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设计工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
支持的产品和硬件
参考设计

TIPD160 — 基于 MDAC 的数字可调状态变量滤波器参考设计

这种基于 MDAC 的状态变量滤波器可针对增益、中心/截止频率以及品质因数提供高精度的数字调节。该电路提供三个独立的滤波器输出：低通、带通和高通，且这些输出可同时获取。  此电路适用于从音频到工业等需要精确数字滤波器调节的广泛应用！

支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (PW) 16 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

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